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S3C6400X RISC MICROPROCESSOR
PCM R
FIFO REGISTER
X
Register
PCM_RXFIFO
0x7F00900C
0x7F00A00C
The bit definitions for the PCM_RXFIFO Register are described below:
PCM_RXFIFO
Reserved
RXFIFO_DVALID
RXFIFO_DATA
Address
R/W
R/W
Bit
[31:17]
Reserved
[16]
RXFIFO data is valid
Write: Not Valid
Read: TXFIFO read data valid
1: valid
0: invalid (probably read an empty fifo)
[15:0]
RXFIFO DATA
Write: RXFIFO_DATA is written into the RXFIFO
NOTE: writing the RXFIFO is meant to support debugging.
Online the RXFIFO is written by the PCM serial shift engine,
not the APB
Read: TXFIFO is read using the APB interface
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Control the PCM Audio Inteface
Description
PCM AUDIO INTERFACE
Reset Value
0x00000000
Initial
State
0
0
37-11
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