Samsung S3C6400X User Manual page 1038

S3C6400
RISC MICROPROCESSOR
SPECIAL FUNCTION REGISTERS
REGISTER MAP
Register Offset
TCFG0
0x7F006000
TCFG1
0x7F006004
TCON
0x7F006008
TCNTB0
0x7F00600C
TCMPB0
0x7F006010
TCNTO0
0x7F006014
TCNTB1
0x7F006018
TCMPB1
0x7F00601c
TCNTO1
0x7F006020
TCNTB2
0x7F006024
TCMPB2
0x7F006028
TCNTO2
0x7F00602c
TCNTB3
0x7F006030
TCMPB3
0x7F006034
TCNTO3
0x7F006038
TCNTB4
0x7F00603c
TCNTO4
0x7F006040
TINT_CSTAT
0x7F006044
R/W
Timer Configuration Register 0 that configures the
R/W
two 8-bit Prescaler and DeadZone Length
Timer Configuration Register 1 that controls 5
R/W
MUX and DMA Mode Select Bit
Timer Control Register
R/W
Timer 0 Count Buffer Register
R/W
Timer 0 Compare Buffer Register
R/W
Timer 0 Count Observation Register
R
Timer 1 Count Buffer Register
R/W
Timer 1 Compare Buffer Register
R/W
Timer 1 Count Observation Register
R
Timer 2 Count Buffer Register
R/W
Timer 2 Compare Buffer Register
R/W
Timer 2 Count Observation Register
R
Timer 3 Count Buffer Register
R/W
Timer 3 Compare Buffer Register
R/W
Timer 3 Count Observation Register
R
Timer 4 Count Buffer Register
R/W
Timer 4 Count Observation Register
R
Timer Interrupt Control and Status Register
R/W
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Pulse Width Modulation Timer
Description Reset Value
0x0000_0101
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
32-15