Peripheral Device Transfer (PDT)
Figure 4−33. Case E: PDT Read and Write Interface With Multiple FIFOs Block Diagram
ECLKIN
ECLKOUT1
SDRAS
SDCAS
SDWE
EMIFA
SDCKE
BE[7:0]
EA[18:3]
PDTDIR (EA20)
ED[63:0]
4-52
TMS320C64x EMIF
CEy
CEn
PDT
Direction
detect
Demux and
signal
generation
Dir
SDRAM or
non-SDRAM
CS
CS
CLK
RAS
CAS
SDRAM
WE
CKE
DQM[7:0]
A[15:0]
D[63:0]
RCLK
Synchronous
REN
FIFO
OEN
Q[63:0]
WCLK
Synchronous
WEN
FIFO
Q[63:0]
SPRU266A