Emif Ce Space Control Register (Cectl) - Texas Instruments TMS320C6000 DSP Reference Manual

2.8.2 EMIF CE Space Control Registers (CECTL0−3)
Figure 2−16. EMIF CE Space Control Register (CECTL)
31 28 27
WRSETUP
R/W-1111
15 14 13
Reserved
R/W-0
Legend: R/W = Read/Write; -n = value after reset
SPRU266A
The CE space control register (CECTL) is shown in Figure 2−16 and
described in Table 2−12. These registers correspond to the CE memory
spaces supported by the EMIF. There are four CE space control registers
corresponding to the four external CE signals.
The MTYPE field identifies the memory type for the corresponding CE space.
If the MTYPE field selects a synchronous memory type, the remaining register
fields have no effect. If the MTYPE field selects an asynchronous type, the
remaining register fields specify the shaping of the address and control signals
for access to that space. These features are discussed in section 1.5.
The MTYPE field should only be set once during system initialization, except
when CE1 is used for ROM boot mode. In this mode, the CE space can be
configured to another asynchronous memory type.
Except for C6201/C6701 DSPs, all other C620x/C670x DSPs support one
synchronous memory type because these devices support SDRAM back-
ground refresh and they have shared synchronous memory control signals.
The presence of both memory types could corrupt SBSRAM accesses during
SDRAM refresh. Therefore, software must ensure that when a CE space is set
up as a synchronous memory type, no other CE spaces are set up as a different
synchronous memory type. For example, if a CE space is set as SBSRAM,
then no other CE spaces should be set as SDRAM. Similarly, if a CE space is
set as SDRAM, then no other CE spaces should be set as SBSRAM.
WRSTRB
R/W-11 1111
8
RDSTRB
R/W-11 1111
22 21 20 19
WRHLD
R/W-11
7 6 4 3
— MTYPE
R/W-0 R/W-010
TMS320C620x/C670x EMIF
EMIF Registers
16
RDSETUP
R/W-1111
2 1 0
Reserved RDHLD
R/W-0 R/W-11
2-27