Denon AVR-X1100W Service Manual page 125

Integrated network av receiver
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Pin No.
Mnemonic
Type
99
PGND
Ground
100
PVDD
Power
101
XTAL
Miscellaneous
analog
102
XTAL1
Miscellaneous
analog
103
PVDD
Power
104
PGND
Ground
105
HP_CTRLA
Digital output
106
5V_DETA
Digital input
107
RTERM
Miscellaneous
analog
108
DDCA_SDA
Digital I/O
109
DDCA_SCL
Digital input
110
CVDD
Power
111
CGND
Ground
112
RXA_C−
HDMI input
113
RXA_C+
HDMI input
114
TVDD
Power
115
RXA_0−
HDMI input
116
RXA_0+
HDMI input
117
CGND
Ground
118
RXA_1−
HDMI input
119
RXA_1+
HDMI input
120
TVDD
Power
121
RXA_2−
HDMI input
122
RXA_2+
HDMI input
123
HP_CTRLB
Digital output
124
5V_DETB
Digital input
125
DGND
Ground
126
DVDD
Power
127
DDCB_SDA
Digital I/O
128
DDCB_SCL
Digital input
129
CVDD
Power
130
CGND
Ground
131
RXB_C−
HDMI input
132
RXB_C+
HDMI input
133
TVDD
Power
134
RXB_0−
HDMI input
135
RXB_0+
HDMI input
136
CGND
Ground
137
RXB_1−
HDMI input
138
RXB_1+
HDMI input
139
TVDD
Power
140
RXB_2−
HDMI input
141
RXB_2+
HDMI input
142
HP_CTRLC
Digital output
143
5V_DETC
Digital input
144
DDCC_SDA
Digital I/O
Description
PVDD Ground.
PLL Supply Voltage (1.8 V).
Input pin for 28.63636 MHz crystal or an external 1.8 V 28.63636 MHz clock oscillator source to
clock the ADV7623.
Crystal Output Pin. This pin should be left oating if a clock oscillator is used.
PLL Supply Voltage (1.8 V).
PVDD Ground.
Hot Plug Detect for Port A.
5 V Detect Pin for Port A in the HDMI Interface.
This pin sets the internal termination resistance. A 500 Ω resistor between this pin and
ground should be used.
HDCP Slave Serial Data Port A. DDCA_SDA is a 3.3 V input/output that is 5 V tolerant.
HDCP Slave Serial Clock Port A. DDCA_SCL is a 3.3 V input that is 5 V tolerant.
Receiver Comparator Supply Voltage (1.8 V).
TVDD and CVDD Ground.
Digital Input Clock Complement of Port A in the HDMI Interface.
Digital Input Clock True of Port A in the HDMI Interface.
Receiver Terminator Supply Voltage (3.3 V).
Digital Input Channel 0 Complement of Port A in the HDMI Interface.
Digital Input Channel 0 True of Port A in the HDMI Interface.
TVDD and CVDD Ground.
Digital Input Channel 1 Complement of Port A in the HDMI Interface.
Digital Input Channel 1 True of Port A in the HDMI Interface.
Receiver Terminator Supply Voltage (3.3 V).
Digital Input Channel 2 Complement of Port A in the HDMI Interface.
Digital Input Channel 2 True of Port A in the HDMI Interface.
Hot Plug Detect for Port B.
5 V Detect Pin for Port B in the HDMI Interface.
DVDD Ground.
Digital Supply Voltage (1.8 V).
HDCP Slave Serial Data Port B. DDCB_SDA is a 3.3 V input/output that is 5 V tolerant.
HDCP Slave Serial Clock Port B. DDCB_SCL is a 3.3 V input that is 5 V tolerant.
Receiver Comparator Supply Voltage (1.8 V).
TVDD and CVDD Ground.
Digital Input Clock Complement of Port B in the HDMI Interface.
Digital Input Clock True of Port B in the HDMI Interface.
Receiver Terminator Supply Voltage (3.3 V).
Digital Input Channel 0 Complement of Port B in the HDMI Interface.
Digital Input Channel 0 True of Port B in the HDMI Interface.
TVDD and CVDD Ground.
Digital Input Channel 1 Complement of Port B in the HDMI Interface.
Digital Input Channel 1 True of Port B in the HDMI Interface.
Receiver Terminator Supply Voltage (3.3 V).
Digital Input Channel 2 Complement of Port B in the HDMI Interface.
Digital Input Channel 2 True of Port B in the HDMI Interface.
Hot Plug Detect for Port C.
5 V Detect Pin for Port C in the HDMI Interface.
HDCP Slave Serial Data Port C. DDCC_SDA is a 3.3 V input/output that is 5 V tolerant.
125

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