Ps8625 - EUROCOM ARMADILLO 2 W840AU Service Manual

PS8625

5
Power
3.3VS L39 3.3VS L36
. AVCC33 . DVCC33 DVCC33
HCB1608KF-121T25 HCB1608KF-121T25
C494 C490 C480
10u_6.3V_X5R_06 10u_6.3V_X5R_06
0.1u_10V_X7R_04
Note: 1. Entire trace of Panel VCC should be wider than 80-mil
D
R146 1K_04 HPD
LVDS
8 EDP_HPD
C124 0.1u_10V_X7R_04 DAUXn
2 EDP_AUXN LVDS
C125 0.1u_10V_X7R_04 DAUXp
2 EDP_AUXP
R166 *0_04
DP_AUX# 15
eDP
R167 *0_04
DP_AUX 15
C126 0.1u_10V_X7R_04 DRX0p
2 EDP_TXP_0 LVDS
C127 0.1u_10V_X7R_04 DRX0n
2 EDP_TXN_0
R168 *0_04
DP_TXP0 15
eDP
R169 *0_04
DP_TXN0 15
C128 0.1u_10V_X7R_04 DRX1p
2 EDP_TXP_1
LVDS
C C129 0.1u_10V_X7R_04 DRX1n
2 EDP_TXN_1
R170 *0_04
DP_TXP1 15
eDP
R171 *0_04
DP_TXN1 15
R606 *0_04 PANEL_PW M
eDP
R607 0_04
LVDS
8 L_BRIGHTNESS_R
BRIGHTNESS_EC_PS
28 BRIGHTNESS
R608 *0_04
R100
D02
*100K_04
LVDS BOM R607 ;EDP BOM R606
Mode Configure Table(Power On Latch)
B
MODE_CFG0(PIN47)
0 1
0 X EP MODE
MODE_CFG1(PIN48)
1 ROM ONLY MODE EEPROM MODE
3.3VS 3.3VS
RTD2136 Supports three operation mode for system design.
Reserved 4.7K resistor pull up/low for mode selection
R144 R145
*4.7K_04 4.7K_04
ROM ONLY Mode : PIN47 4.7K pull low, PIN48 4.7K pull high
EP Mode : PIN47 4.7K pull high, PIN48 4.7K pull low
EEPROM Mode : PIN47 4.7K pull high, PIN48 4.7K pull high
A
R475 R484
4.7K_04 *4.7K_04
LVDS
5
4 3
LVDS
C493
0.1u_10V_X7R_04
C482
0.1u_10V_X7R_04
U8
1
HPD
DP_HPD
TEST_MODE 2
TEST_MODE
DAUXn 3
AUX_CH_N
PR175
DAUXp 4
100K_04
AUX_CH_P
AVCC33 5
DP_V33
6
DP_GND RTD2136N
DRX0p 7
LANE0_P
DRX0n 8
LANE0_N
9
DRX1p
LANE1_P
DRX1n 10
LANE1_N
VCCK_V12
11
DP_V12
DP_REXT 12
DP_REXT
DVCC33
Note: Entire trace of Panel VCC should be wider than 80-mil
3.3VS
/ 
WZKD
3.3VS
R65 *0_04 P_DDC_CLK
28 SMC_EDP_CLK
R64 *0_04 P_DDC_DATA
28 SMD_EDO_DAT
6-04-02402-A94
EEPROM Mode I2C address=0xA8
In EEPROM mode, an additional EEPROM is needed.
EEPROM should configure with following condition.
1- EEPROM with a size 8K-Byte
2- EEPROM device should be 2-byte addressing device
3- Slave address should configure as 0xA8
4 3
2
ENBLT
ENBLT 15
R128
*10K_04
LVDS
PANEL_PW M
PANEL_PW M 15
R123
eDP *10K_04
LVDS-L0N
LVDS-L0N 15
LVDS-L0P
LVDS-L0P 15
LVDS-L1N
LVDS-L1N 15
Single link LVDS-L1P
LVDS-L1P 15
LVDS
LVDS-L2N
LVDS-L2N 15
36
LVDS-LCLKN LVDS-L2P
LVDS-L2P 15
TXOC-
35 LVDS-LCLKP LVDS-LCLKN
TXOC+ LVDS-LCLKN 15
LVDS-LCLKP
LVDS-LCLKP 15
34
TXO3-
33 LVDS-U0N
LVDS-U0N 15
TXO3+
LVDS-U0P
LVDS-U0P 15
32 LVDS-U0N
TXE0-
LVDS-U1N
LVDS-U1N 15
31 LVDS-U0P LVDS-U1P
LVDS-U1P 15
TXE0+
30 LVDS-U1N LVDS-U2N
LVDS-U2N 15
TXE1-
LVDS-U2P
LVDS-U2P 15
29 LVDS-U1P
TXE1+
LVDS-UCLKN
LVDS-UCLKN 15
28
LVDS-U2N LVDS-UCLKP
LVDS-UCLKP 15
TXE2-
27 LVDS-U2P
TXE2+
26 LVDS-UCLKN
TXEC-
P_DDC_CLK
P_DDC_CLK 15
25 LVDS-UCLKP P_DDC_DATA
P_DDC_DATA 15
TXEC+
LVDS
RTD_PLVDD_EN
C481
R461
4.7u_6.3V_X5R_06
1K_04
RTD2136N-CG
To LVDS Connector
Dual Mode Regulator Configuration
2.2-uH(L3) 0 Olm(R15)
SWR Connect NC
LDO NC Connect
SWR MODE
RTD_PLVDD_EN 15
L37
BCNR3010C-2R2M
1 2
PIN17
LDO MODE
U4
8 1 PIN17 R133 *0_06
VCC A0
7 2
WP A1
6 3
SCL A2
5 4
SDA GND
*HT24LC02
1.C516, C511 Capacitors should be closed to PIN17
3.3VS 2,4,5,6,7,8,10,13,14,15,16,23,24,25,26,28,29,30,32,34,36
PLVDD 15
! ! ! !!DMFWP!DP/ ! ! ! !!DMFWP!DP/ ! ! ! !!DMFWP!DP/
Title Title Title
[22] PS8625(EDP TO LVDS) [22] PS8625(EDP TO LVDS) [22] PS8625(EDP TO LVDS)
Size Size Size Document Number Document Number Document Number
6-71-W8400-D04A
A3 A3 A3 SCHEMATIC1 SCHEMATIC1 SCHEMATIC1
Date: Date: Date: Thursday, December 18, 2014 Thursday, December 18, 2014 Thursday, December 18, 2014
2
Schematic Diagrams
1
R123 EDP BOM DY
D
Sheet 22 of 42
PS8625
C
PLVDD
0_06 R452
B
LVDS
VCCK_V12 VCCK_V12
A
Rev Rev Rev
1.0 1.0 1.0
Sheet Sheet Sheet 22 22 22 of of of 42 42 42
1
PS8625 B - 23