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Troubleshooting
Check Points and Error Messages
At the beginning of each POST routine, the BIOS outputs the test point error code to I/O
address 80h. Use this code during troubleshooting to establish at what point the system failed
and what routine was being performed.
If the BIOS detects a terminal error condition, it halts POST after:
•
Issuing a terminal error beep code and
•
Attempting to display the error code on upper left corner of the screen and on the port
80h LED display
If the system hangs before the BIOS can process the error, the code displayed at port 80h is
that of the last test performed. In this case, the screen does not display the error code.
Phoenix BIOS Test Points
The following is a list of the checkpoint codes written at the start of each test and the beep
codes issued for terminal errors:
Code
02
04
06
08
09
0A
0C
0E
0F
10
11
12
14
16
18
1A
1C
20
22
24
28
2A
2C
2E
30
32
34
35
37
38
3–6 Digital HiNote VP 500 Service Guide
Beeps
POST Routine Description
Verify Real Mode
Get CPU type
Initialize system hardware
Initialize chipset registers with initial POST values
Set in POST flag
Initialize CPU registers
Initialize cache to initial POST values
Initialize I/O
Initialize the local bus IDE
Initialize Power Management
Load alternate registers with initial POST values
Jump to UserPatch0
Initialize keyboard controller
2-2-3
BIOS ROM checksum
8254 timer initialization
8237 DMA controller initialization
Reset Programmable Interrupt Controller
3-1-1
Test DRAM refresh
3-1-3
Test 8742 Keyboard Controller
Set ES segment register to 4 GB
Autosize DRAM
Clear 512K base RAM
3-4-1
Test 512K base address lines
3-4-3
Test 512K base memory
Base 64K RAM Error
Test CPU bus-clock frequency
Test CMOS RAM
Initialize alternate chipset registers
Reinitialize the chipset
Shadow system BIOS ROM
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