T-Sgpio 1/2 & 3-Sgpio 1/2 Headers; I-Button - Supermicro SuperO X8DTL-3 User Manual

X8DTL-3/X8DTL-i/X8DTL-3F/X8DTL-iF User's Manual
T-SGPIO 1/2 & 3-SGPIO 1/2
Headers
Two SGPIO (Serial-Link General
Purpose Input/Output) headers
(T-SGPIO-1/T-SGPIO-2) are located
the motherboard. In addition, 3-GPIO
1/2 located on the X8DTL-3/X8DTL-
3F models These headers support
serial link interfaces for the onboard
SATA and SAS connectors. See the
table on the right for pin defi nitions.
Refer to the board layout below for
the location.

I-Button

An onboard I-Button, located next to
USB Ports 2~3, is an 1-wire computer
chip enclosed in a durable stainless
steel can. I-Button stores instruc-
tions, provides electronic interface
and allows HostRAID to operate with
Mega-RAID fi rmware.
P2-DIMM3A
P2-DIMM2A
P2-DIMM1A
PHY
Chip
CPU2
X8DTL Series
LAN
CTRL
LAN
CTRL
Slot6 PCI-E 2.0 x8 (in x16 Slot)
Slot5 PCI-E 2.0 x4 (in x8 Slot)
W8379 5ADG
W8352 7HG
Slot4 PCI-E 2.0 x8
JPB
JP5
Slot3 PCI-E 1.0 x4
BMC CTRL
WPCM450-R
JI2C2
JPG1
J16
JI2C1
Slot2 PCI 33MHz
JWOL
JWD
JD1
Slot1 PCI 33MHz
A
T-SGPIO1
COM2
Buzzer
USB2/3 USB4/5 USB6 BIOS
B
SP1
T-SGPIO2
Pin#
1
3
5
7
FAN1/
JPW3 JPW2 CPU2 FAN
JPW1
CPU1
FAN2/
CPU1FAN
FAN3
P1-DIMM1A
P1-DIMM2A
P1-DIMM3A
Intel
5500
(North Bridge)
E
JOH1
LSI SAS1068E
Intel JBT1
ICH10R
(South Bridge)
Battery
JL1
3-SGPIO1
JBAT1
3-SGPIO2
JPS2
2-24
T-SGPIO
Pin Defi nitions
Defi nition Pin Defi nition
NC 2 NC
Ground 4 Data
Load 6 Ground
NC 8 NC
Note: NC= No Connections
A. T-SGPIO-1
B. T-SGPIO-2
C. 3T-SGPIO-1 (X8DTL-3/-3F)
D. 3T-SGPIO-2 (X8DTL-3/-3F)
E. I-Button
C
D