T-Sgpio 1/2 Headers - Supermicro X8OBN-F User Manual

X8obn-f platform
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T-SGPIO 1/2 Headers

Two SGPIO (Serial-Link General
Purpose Input/Output) headers are lo-
cated on the baseboard. These head-
ers support Serial_Link interface for
onboard SATA connections. See the
table on the right for pin defi nitions.
X8OBN-F Baseboard
Rev. 1.01
Fan12
J30
J29
Fan 11
Fan 10
UID
Fan 9
JPT1
JUID_OW1
LAN CTRL
Slot10 PCI-E 2.0 x16
Slot9 PCI-E 2.0 x8
Slot8 PCI-E 2.0 x16
LED4
Slot7 PCI-E 2.0 x8
BMC CTRL
Slot6 PCI-E 2.0 x16
Slot5 PCI-E 2.0 x8
Slot4 PCI-E 2.0 x16
Slot3 PCI-E 2.0 x8
Slot2 PCI-E 2.0 x8 in x16
Slot1 PCI-E 2.0 x8 in x16
Pin#
1
3
5
7
JWD1
JOH1
CPU Board Slot 4
CPU Board Slot 3
CPU Board Slot 2
CPU Board Slot 1
Fan8
I/O Hub 2
I/O Hub 1
PLX
Battery
PCI Bridge
BT1
JBT1
JPME1
ICH10R
Buzzer
JWF1
I-SATA5
I-SATA3
I-SATA1
JIPMB1
JTPM1
COM2
USB10 USB8
I-SATA4
I-SATA2 I-SATA0
3-25
Chapter 3: Installation
T-SGPIO
Pin Defi nitions
Defi nition
Pin
Defi nition
NC
2
NC
Ground
4
Data
Load
6
Ground
Clock
8
NC
Note: NC= No Connection
JF1
FP CRTL
Fan6
Fan5
JP18
Fan4
JP19
JP17
Fan3
JP16
JPWR4
A. T-SGPIO1
JP3
B. T-SGPIO2
Fan7
JP22
JPWR2
B
JL1
JP21
T-SGPIO1
A

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