HP 340 Series Service Manual page 87

Memory Tests
11emory tests are performed on main memory. The same messages are used for reporting all
Inemory failures, but they are interpreted slightly differently for word and byte memory tests.
For word wide Inemory test errors, the following message is displayed:
Memory Failed at AAAAAAAA
(W:BBCCDDEE. R:FFGGHHII)
VVhere:
• W: BBCCDDEE is the write pattern,
• R: FFGGHHII is the read pattern,
• BB and FF are at address AAAAAAAA,
• CC and GG are at address AAAAAAAA+l,
• DD and EE are at address AAAAAAAA+2, and
• EE and II are at address AAAAAAAA+3.
For byte-wide display and interface circuit memory test errors, the following message
IS
displayed:
Memory Failed at AAAAAAAA
(W:BBCCDDEE. R:FFGGHHII)
\\There:
• W: BBCCDDEE is the write pattern,
• R: FFGGHHII is the read pattern,
• BB and FF are at address AAAAAAAA,
• CC and GG are at address AAAAAAAA+2,
• DD and EE are at address AAAAAAAA+4, and
• EE and II are at address AAAAAAAA+6.
Parity checking is enabled during the memory test phase. Error messages are of two types:
parity bit error at FFFF1234
~v1eans
a failure was detected in the parity checking RAM for the address shown.
data parity error at FFFF4321
(W:BBCCDDEE. R:FFGGHHII)
A RAM failure was detected at the address shown. The address in parity error messages is
the lowest of four consecutive addresses. Errors could have occurred in any or all of these four
addresses. Parity errors will be displayed during the TESTING MEMORY phase of the self-test
and testing will continue.
Boot ROM Functions
75