Power Supply Circuits; Port Allocations - Icom IC-F310 Service Manual

4-4 POWER SUPPLY CIRCUITS

4-4-1 VOLTAGE LINES (MAIN unit)
Line
The voltage from a DC power supply.
VCC
The same voltage as the VCC line which is con-
trolled by the power switching circuit (Q25, Q26).
When the [POWER] switch is pushed, the CPU
HV
outputs the "PWON" control signal to the power
switching circuit to turn the circuit ON.
Common 5 V for the CPU converted from the
VCC line by the CPU5V regulator circuit (IC9).
CPU5V
The circuit outputs the voltage regardless of the
power ON/OFF condition.
Common 8 V converted from the HV line by the
8V
8V regulator circuit (Q36).
Common 5 V converted from the VCC line by the
5V
5V regulator circuit (Q29, Q30).
Receive 5 V controlled by the R5 regulator circuit
(Q27) using the "T5C" signal from the I/O
R5
expander IC (IC11).
Transmit 5 V controlled by the T5 regulator circuit
(Q28) using the "T5C" signal from the I/O
T5
expander IC (IC11).

4-5 PORT ALLOCATIONS

4-5-1 CPU (FRONT unit; IC1)
Pin Port
number name
Input port for overvoltage detection
1 VIN
from the connected power supply.
Outputs clock signal to the EEPROM
(IC3), PLL IC (MAIN unit; IC2) and
12 SCK
expander ICs (MAIN unit; IC5, IC11),
etc.
Input port for the data signals from the
13 SI
EEPROM (IC3), etc.
Outputs data signals to the EEPROM
(IC3), PLL IC (MAIN unit; IC2) and
14 SO
expander ICs (MAIN unit; IC5, IC11),
etc.
Input port for the cloning signal.
16 CLIN
Output port for the cloning signal.
17 CLOUT
Input for the POWER switch.
Low : While POWER switch is
18 POSW
NOIS signal input port from the FM IF
IC (MAIN unit; IC3) for noise squelch
19 NOIS
operation.
Input port for the PTT switch.
26 PTT
Low : While PTT switch is pushed.
Description
Description
pushed.
CPU (IC1)—continued
Pin Port
number name
32 RFATT
36 UNLK
37 PWON
38
DIM
39 EXTPTT
40 DIMIN
41 PLST
42
DAST
43 EXST
45, 46 KS1, KS0
KR3–
47–50
KR0
51 BM
CTDA0–
52–54
CTDA2
55
HANG
90
MTONE
91 TONED
OPV3–
94–96
OPV1
97 CTCIN
SD
98
LVIN
99
100
TEMP
4 - 4
Description
Outputs RF attenuator control signal to
the attenuator switch (MAIN unit; Q35).
Low : While attenuator function is ON.
Input port for PLL unlock signal from
the PLL IC (MAIN unit; IC2).
High: During unlock.
Outputs control signal for the power
switching circuit (MAIN unit; Q25) and
5V regulator circuit (MAIN unit; Q29,
Q30).
Outputs control signal for LCD back-
light.
Low : While LCD backlight is ON.
Input port for the PTT switch from the
external connector (MAIN unit; J3).
Low : External PTT switch is ON.
Input port for the LCD backlight control
signal from the external connector
(MAIN unit; J3).
Low : External dimmer switch is ON.
Outputs strobe signals for the PLL IC
(MAIN unit; IC2).
Outputs strobe signals for the level
controller IC (MAIN unit; IC5).
Outputs strobe signals for the I/O
expander IC (MAIN unit; IC11).
Output ports for the key matrix.
Input ports for the key matrix.
Outputs control signal for the beep
mute circuit (Q10).
High: Beep muted.
Output port for the CTCSS/ DTCS sig-
nals.
Input ports for the microphone hanger
detection signal.
Low : Microphone on hook
Output port
beep audio while receiving.
2/5 tone signals while transmitting.
Outputs DTMF signals.
Input port for the option connector state
(MAIN unit; J2).
Input port for the CTCSS/DTCS
decode signals.
Input port for S-meter signal.
Input port for PLL lock voltage.
Input port for the transceiver's internal
temperature.