Pll Circuits; Power Supply Circuits - Icom IC-2100H Service Manual

3-3 PLL CIRCUITS

3·3·1 PLL CIRCUIT
A PLL circuit provid es stable oscillation o f the transmit fre­
quency and the receive 1st LO frequency. The PLL circuit
compares the phase of the d ivided VCO frequency to the ref­
erence frequency. The PLL output frequency is controlled by
the d ivided ratio ( N -d ata) of a prog rammable di vid er.
An oscillated signal from the VCO passes thorough the buffer
a mplifiers (04, 06) is applied to the PLL I C (IC1, pin 2) and
is prescaled I n the PLL IC based on the divided ratio ( N ­
data). The reference signal is g enerated at the reference
oscillator (X1) and is also applied to the PLL I C . The PLL IC
d etects the out-of-step phase using the reference frequency
and outputs it from pin 8. The output signal is passed thor­
ough the l o op filter (R89, R90, C105, C107) and is then
applied to the VCO circuit as the lock voltage.
The lock voltag e is also used f o r the receiver tunable band­
pass fi l ter s to match the filter's center frequency to the
d esired receive frequency. The lock voltag e is applied to the
bandpass filters (013-016) via the tune control circuit (IC4,
04).
3--3-2 VCO CIRCUIT (MAIN unit)
The VCO circuit contains a separate TX-VCO (01, 02, 01)
and RX-VCO (033, 023). The oscillated signal is amplif i e d at
the buffer (Q4) and LO (05) amplif i e rs, and is then applied to
the T/R switching circuit (0 5). Then the Tx and Rx signals are
applied to the pre-d river (013) and 1st mixer (021) respec­
tively.
A portion o f the signal from 04 is amplified at the bu f fer
a111plifier (06) and is then fed back to the Pll IC (IC1 pin 2)
as the compar i s on signal.
•
PLL circuit
FM IF IC
to the

3-4 POWER SUPPLY CIRCUITS

VOLTAGE LINES
TXVCO
*(S)
: 01, 02, 01
�--.. ----·_.,
f-
RXVCO
_J_ If\\
!
I
I
!
Q33, 023
3-3
Description
Line
The voltage from the connected DC power sup-
HV
ply.
The same voltage as the HV l i ne which is con·
trolled by the power switching circuit (025, 026,
035). When the [ P OWER] switch is pushed, the
13.SV
CPU outputs the "PWRON" control signal to the
power switching circuit to turn the circuit ON.
Common 5 V for the CPU converted from the HV
l i ne by the CSV regulator circuit (IC9 ). The circuit
C5V
outputs the voltag e regard less o f the power
ON/O F F cond ition.
Common B V converted from the 13.SV line by
+SV
the +av regulator circuit (IC 5).
Receive 8 contr olled by the RSV reg ulator cir-
V
cuit (029, 030) using the "RX" signal from the
RSV
1 1 0 expander IC (IC1 0).
Transmit 8 V controlled by the T8V reg ulator cir-
cult (011. 012) using the "TX" signal from the 1 / 0
T8V
expander IC (IC10 ).
converted from the +SN' line by the
Common 5 V
+SV
+5V reg ulator circuit (031, 032).
05
:·····-;
to transmitter circuit
i
to 1st mixer circuit
Buffer
IC1 (PLL IC)