4-4 POWER SUPPLY CIRCUITS
4-4-1
Line
VOLTAGE LINES (MAIN UNIT)
v
HV
The voltage from the external power supply.
13. 8
The same voltage as the HV line (external power
supply) which is controlled by the power switch
control circuit (MAIN unit 03, 04).
5 V
Common 5 V converted from the HV line by the
5 V regulator circuit (MAIN unit ICl ). The circuit
outputs the voltage regardless of whether
av
[POWER) switch is ON/OF F .
Common 8 V converted from the 13.8 V line by
the 8 V regulator circuit (MAIN unit IC3). The
output voltage is supplied to the VTB V, UTB V and
V-VRB V regulator circuits, etc.
V-VRB V
8 V for V-VHF receiver circuits converted from the
8 V line by the V-V BIAS SEL circuit (MAIN unit
065, 068, 056).
V-URB V
8 V for V-UHF receiver circuits converted from the
8 V line by the V-U BIAS SEL circuit (MAIN unit
067, 069, 057).
U-VRB V
8 V for U-VHF receiver circuits converted from the
8 V line by the U-V BIAS SEL circuit (MAIN unit
0150, 0154, 0115).
U-URB V
8 V for U-UHF receiver circuits converted from the
8 V line by the U-U BIAS SEL circuit (MAIN unit
0152, 0155, 082, 0116).
VTBV
8 V for VHF transmitter circuits converted from the
8 V line by the VTB V regulator circuit (MAIN unit
025, 026).
8 V for UHF transmitter circuits converted from the
UTBV
8 V line by the UT8 V regulator circuit (MAIN unit
0141, 0142).
PLL8 V
Common 8 V for PLL loop circuits converted from
the 13.8 V line by the PLL regulator circuit (MAIN
unit IC2, 0152). The output voltage is supplied to
PLL loop filter circuits.
Common 5 V for PLL circuits converted from the
PLL5 V
8 V line by the PLL5 V regulator circuit (MAIN unit
0202, 0203).
Description
4-5 PORT ALLOCATIONS
CPU (MAIN UNIT)
4-5-1
Pin
Port
number
name
Input port for the reset circuit (MAIN
9
RES
unit IC30, 0184, D147).
Outputs data signal to the EEPROM
11
EDATA
(MAIN unit IC31 ).
Outputs serial clock signal to a PLL
12
SCK
and optional units.
Input port to detect optional tone
squelch unit (UT-104) installation.
13
UNITT
Outputs serial data signal to PLL and
an optional tone squelch unit
14
SDATA
(UT-104).
Input port to detect optional DTMF
encoder/decoder unit (UT-49)
OPD
15
installation.
Input port for serial signal from the
16
RXD
sub-CPU (CONTROL unit IC2).
Output port for serial signal to the
TXD
17
sub-CPU (CONTROL unit IC2).
Input port for [POWER) switch ON
signal while a transceiver is turned
18
PCHK
OFF.
Input port to detect optional wireless
microphone (HM-90) connection.
21
EXTMIC
Input port for microphone serial data.
23
MICIN
Outputs 1750 Hz Europe tone signal.
25
ETONE
Outputs clock signal for the
26
ECK
EEPROM IC (MAIN unit IC31 ).
Outputs strobe signal for the D/A
33
STBV
controller (MAIN unit IC19).
Outputs data signal for the D/A
34
ADATA
controller (MAIN unit IC19).
Outputs clock signal for the D/A
35
ACK
controller (MAIN unit IC19).
Input ports for initial matrix.
36-39
110-113
Outputs strobe signal for initial
40-42
ISO-IS2
matrix.
Outputs strobe signal for tone
44
STBTA
squelch unit (VHF band).
Input port for tone squelch detector.
45
TSQLA
Outputs strobe signal for tone
46
STBTB
squelch unit (UHF band).
4 - 5
Description
"High": UT-104 is installed.
"Low" : UT-49 is installed.
"Low" : HM-90 is connected.
"Low" : A matched tone signal is
received.
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