Fuling Inverter DZB200 Series User Manual page 49

Dzb300 series high-performance general-purpose inverter, open-loop vector control inverter
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DZB Series
CRC CHK lower bit
CRC CHK higher bit
END
T1-T2-T3-T4 (tra nsmission time of 3.5 bytes)
RTU
Response M essage of the Slave
START
T1-T2-T3-T4 (tra nsmission time of 3.5 bytes)
ADDR
CMD
Write higher bits of the data address
Write lower bits of the data address
Higher bits of data content
Lower bits of data content
CRC CHK lower bit
CRC CHK higher bit
END
T1-T2-T3-T4 (tra nsmission time of 3.5 bytes)
ASCII Command Message of the Master
START
ADDR
CMD
Write higher bits of the data address
Write lower bits of the data address
Higher bits of data content
Lower bits of data content
LRC CHK Hi
LRC CHK Lo
END Lo
END Hi
Appendix B Serial Communications
05H
6DH
02H
06H
00H
08H
13H
88H
05H
6DH
':'
'0'
'2'
'0'
'6'
'0'
'0'
'0'
'8'
'1'
'3'
'8'
'8'
'5'
'5'
CR
LF
- 9 1-
DZB Series
ASCII
Response Message of the Slave
S TART
ADDR
CMD
Write higher bits of the data address
Write lower bits of the data address
Higher bits of data content
Lower bits of data content
LRC CHK Hi
LRC CHK Lo
END Lo
END Hi
6.3 Communication frame error check
Frame error check includes two parts: byte bit check (odd/even parity check) and entire frame data
che ck (CRC check).
6.3.1Byte bit check: The user can select different bit check modes according to the actual needs.
Alte rnatively, the user can select "no parity". This will affect the check bit setting of each byte.
Even check: Insert a even check bit before data transmission to demonstrate the number of "1" in data
content is odd or even. If the number is even, check bit is set "0",otherwise the check bit is set "1", so the
pari ty remain unchanged.
Odd check: Insert a odd check bit be fore data transmission to demonstrate the number of "1" in data
content is odd or even. If the number is odd, check bit is se t "0",otherwise the check bit is set "1", so the
pari ty remain unchanged.
For example, If we want to transmit "11001110", the number of "1" is 5, check bit is "1"when use even
che ck; check bit is "0" when use odd check. The receiver need to do the parit y checking. If the parity of
received data is not the same as the preset value,the communication has some errors.
- 92-
Appendix B Serial Co mmunications
':'
'0'
'2'
'0'
'6'
'0'
'0'
'0'
'8'
'1'
'3'
'8'
'8'
'5'
'5'
CR
LF
www.yusto.ru
info@yusto.ru

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