General Description; Function Block Diagram - NEC MultiSync LCD1920NX User And Service Manual

2.7.2 General description

The THC63LVDM83A transmitter converts 28 bit CMOS/TTL data into four LVDS (Low Voltage Differential
Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a
fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. At a
transmit clock frequency of 65MHz, 24 bits of RGB data and 3bits of LCD timing and control data (HSYNC,
VSYNC, DATA ENABLE) are transmitted at a rate of 455 Mbps per LVDS data channel. Using a 65MHz clock,
the data throughput is 227 Mbytes/sec. The THC63LVDM83A transmitter can be programmed for Rising
edge strobe or Falling edge strobe through a dedicated pin. A Rising edge or Falling edge strobe transmitter
will inter operate with a Falling edge strobe Receiver without any translation logic.
This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL
interfaces.
2.7.3 Functional block diagram
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