G-2. !Pxe Structures For H/W And S/W Undi; G.2.1 32/64-Bit Undi Interface; G.2 Overview - Intel Extensible Firmware Interface Specification

Extensible Firmware Interface Specification

G.2 Overview

There are three major design changes between this specification and the 16-bit UNDI in version 2.1
of the PXE Specification:
•
A new architectural hardware interface has been added.
•
All UNDI commands use the same command format.
•
BC is no longer part of the UNDI ROM.
G.2.1 32/64-bit UNDI Interface
The !PXE structures are used locate and identify the type of 32/64-bit UNDI interface (H/W or
S/W). These structures are normally only used by the system BIOS and universal network drivers.
Offset 0x00
0x00
Len
0x04
0x08 Major Minor
0x0C
0x10
Len
Len +
0x04
Len +
0x08
Len +
0x0C
The !PXE structures used for H/W and S/W UNDIs are similar but not identical. The difference in
the format is tied directly to the differences required by the implementation. The !PXE structures
for 32/64-bit UNDI are not compatible with the !PXE structure for 16-bit UNDI.
The !PXE structure for H/W UNDI is built into the NIC hardware. The first nine fields (from
offsets 0x00 to 0x0F) are implemented as read-only memory (or ports). The last three fields (from
Len to Len + 0x0F) are implemented as read/write memory (or ports). The optional reserved field
at 0x10 is not defined in this specification and may be used for vendor data. How the location of
the !PXE structure is found in system memory, or I/O, space is architecture dependent and is
outside the scope of this specification.
378
!PXE
H/W UNDI
0x01 0x02 0x03
Signature
Rev
Fudge IFcnt
reserved
Implemenation
reserved
Status
Command
CDBaddr
Figure G-2. !PXE Structures for H/W and S/W UNDI
12/12/00
!PXE
S/W UNDI
Offset 0x00 0x01 0x02
Signature
0x00
Len Rev
0x04
Fudge
0x08 Major Minor
Implemenation
0x0C
0x10
EntryPoint
0x14
0x18
reserved
BusType(s)
0x1C
More BusType(s)
0x20
0x03
IFcnt
reserved
#bus
Version 1.02