PLD Data Code Register
1.3.13
PLD Data Code Register
The MVME3100 PLD provides a 32-bit register that contains the build date code of the
timers/registers PLD.
Table 1-16 PLD Data Code Register
REG
BIT
FIELD
OPER
RESET
yy: Last two digits of the year
mm: Month
dd: Day
vv: Version
1.3.14
Test Register 1
The MVME3100 provides a 32-bit general-purpose read/write register that can be used by
software for PLD test or general status bit storage.
Table 1-17 Test Register 1
REG
BIT
FIELD
OPER
RESET
TEST1: General-purpose 32-bit read/write field.
1.3.15
Test Register 2
The MVME3100 provides a second 32-bit test register that reads back the complement of the
data in test register 1.
Table 1-18 Test Register 2
REG
BIT
FIELD
MVME3100 Single Board Computer Programmer's Reference (6806800G37A)
PLD Data Code Register - 0xE200000C
31:24
23:16
yy
mm
R/W
xxxx
Test Register 1 - 0xE2000010
31:0
TEST1
R/W
0000
Test Register 2 - 0xE2000014
31:0
TEST2
Board Description and Memory Maps
15:8
7:0
dd
vv
29