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Board Description and Memory Maps
Table 1-11 PCI Bus B Status Register (continued)
REG
RESET
PCI_B_SPD:
PCI bus B speed. Indicates the frequency of PCI bus B.
00: 33 MHz
01: 66 MHz
10: 100 MHz
11: 133 MHz
PCIX_B: PCI-X bus B. A set condition indicates that bus B is operating in
PCI-X mode. A cleared condition indicates PCI mode.
PCI_B_64B: PCI bus B 64-bit. A set condition indicates that bus B is enabled to operate in 64-
bit mode. A cleared condition indicates 32-bit mode.
ERDY1: EREADY1. Indicates that the PrPMC module installed in PMC site 1 is ready for
enumeration when set. If cleared, the PrPMC module is not ready for enumeration. If no PrPMC
is installed, this bit is always set.
ERDY2: EREADY2. Indicates that the PrPMC module installed in PMC site 2 is ready for
enumeration when set. If cleared, the PrPMC module is not ready for enumeration. If no PrPMC
is installed, the bit is always set.
5.0V_VIO: 5.0V VIO Enabled. This bit set indicates that the PMC bus (PCI bus B) is configured
for 5.0V VIO.
3.3V_VIO: 3.3V VIO enabled. This bit set indicates that the PMC bus (PCI bus B) is configured
to 3.3V VIO.
Table 1-12 PCI Bus C Status Register
REG
BIT
FIELD
OPER
RESET
26
PCI Bus B Status Register - 0xE2000005
X
X
X
PCI Bus C Status Register - 0xE2000006
7
6
5
R
R
R
X
X
X
MVME3100 Single Board Computer Programmer's Reference (6806800G37A)
0
1
X
4
3
2
R
R
R
0
1
X
PCI Bus Status Registers
X
X
1
0
R
R
X
X
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