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Programming Details
Table 2-10 Clock Assignments (continued)
Device
PCI6520 Primary
PMC1
PMC2
PCI6520
Secondary
USB
PMCspan
MPC9855
BCM5461S
BCM5221
Control and
Timers PLD
QUART
sATA
USB
RTC
2.14
MPC8540 Real-Time Clock Input
The MPC8540 real-time clock (RTC) input is driven by a 1 MHz clock generated by the control
and timers PLD. This provides a fixed clock reference for the RTC that software can use as a
known timing reference. To select this 1 MHz clock as the RTC timer reference, software must
set the SEL_TBCLK bit in the MPC8540 HID0 register.
2.15
MPC8540 LBC Clock Divisor
The MPC8540 LBC clock output is used by the control and timers PLD. The LBC clock is
derived from a divide by 2, 4 or 8 ratio of the internal CCB (core complex bus) clock as
determined by the clock ratio register (LCRR[CLKDIV]). For proper operation of the local bus,
CLKDIV must be set for divide by 8, which is the default value. The software must leave this
register configured for divide by 8 during initialization.
44
Clock Signal(s)
CLK_P2P_ABP
CLK_P2P_ACP
CLK_PMC1
CLK_PMC2
CLK_P2P_ABS
CLK_P2P_ACS
CLK_USB
CLK_SPAN
CLK66
CLK25_25V_PHY
CLK25_33V_PHY
CLK25_33V_PLD
CLK_LBC
CLK_UART
CLK37
CLK48
CLK32
MVME3100 Single Board Computer Programmer's Reference (6806800G37A)
MPC8540 Real-Time Clock Input
Frequency
Clock Tree
(MHz)
Source
66/100
A
33/66/100
B
33/66/100
B
33/66/100
B
33
C
33
C
33
C
25
Oscillator
25
Oscillator/
Buffer
25
Oscillator/
Buffer
25
Oscillator/
Buffer
CCB_CLK/8
MPC8540
(333 MHz/8)
1.8432
Oscillator
37.5
Oscillator
48
Oscillator
32.768 kHz
Crystal
Qty
VIO
2
3.3V
1
3.3V
1
3.3V
1
3.3V
1
3.3V
1
3.3V
1
3.3V
2
3.3V
2
2.5V
1
3.3V
1
3.3V
1
3.3V
1
3.3V
1
3.3V
1
3.3V
1
3.3V
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