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MICROPROCESSOR TERMINAL DESCRIPTIONS -2
Q1016: MPD70F3746
Pin No.
Pin Name
DSPCLK
51
52
MUT_RX
53
RST_RX
54
CECOUT
55
CECIN
56
SCL_TX
57
SDA_TX
58
EXPCLK
59
XMRXD
60
XMTXD
61
SRTXD
62
SRRXD
63
SRRST
64
INT_TX
65
RST_TX
66
SYSOUT
67
PLLVSWSCL
68
PLLVSELSDA
69
FLDSDO
70
FLDCLK
71
FSI
72
FSO
73
FCLK
74
SYSIN
75
RDSCLK
76
POFF2
77
FLDRST
78
FLDCS
79
FLD2CS
80
EXPLAT
81
EXPOE
82
SD
83
STEREO
84
DSP1BUSY
85
HS
86
DSP1NIC
87
DSP1DEC
88
DSP1CS
89
DSP1RST
90
DSP2BUSY
91
DSP2CS
92
DSP2RST
93
DIRINT
DIRCLK
94
95
DIRCS
96
DIRRST
97
DACCS
98
DACRST
99
SEC1H
100
SWMUT
I/O
Active
DSP colck output.
O
CLK
I
H
RXMUTE signal input from SII9135.
Reset control output to SII9135/SII9185.
O
L
HDMI CEC output.
O
L
I
L
HDMI CEC input.
SII9134 clock output.
O
CLK
I/O
H
SII9134 data input/output.
O
CLK
Clock output to Expander chip Q1021.
XM data input.
I
L
O
L
XM data output.
SIRIUS UART data output.
O
L
SIRIUS UART data input.
I
L
O
H
SIRIUS reset control output.
INT signal input from SII9134.
I
L
O
L
Reset control output to SII9134.
O
H
RI output.
Clock output to Tuner Unit/Video Switch IC.
O
CLK
I/O
H
Data input/output from/to Tuner Unit/Video Switch IC.
O
H
Data output to FL Driver M66005.
Clock output to FL Driver M66005.
O
CLK
I
H
Data input from Flash Writer.
Data output to Flash Writer.
O
H
I
CLK
Clock input from Flash Writer.
I
H
RI input.
RDS clock input.
I
CLK
I
L
Power down/resume (P-OFF2) detecting input.
O
L
Reset control output to FL Driver M66005.
Chip selecting signal to FL Driver1 M66005.
O
L
O
L
Chip selecting signal to FL Driver2 M66005.
Latch output to Expander chip Q1021.
O
H
Control output to Expander chip Q1021.
O
H
I
L
FM/AM Tuned detecting input.
FM STREO detecting input.
I
L
I
H
1st DSP's BUSY detecting input.
O
H
Hand-shake output to Flash Writer.
1st DSP's status change detecting input.
I
H
I
H
1st DSP's decoding success detecting input.
1st DSP's chip selecting output.
O
L
1st DSP's reset control output.
O
L
I
H
2nd DSP's BUSY detecting input.
2nd DSP' chip selecting output.
O
L
O
L
2nd DSP's reset control output.
I
H
DIR/CODEC's UNLOCK detecting input.
DIR/CODEC's clock output.
O
CLK
O
L
DIR/CODEC's chip selecting output.
DIR/CODEC's reset control output.
O
L
CS4382A chip selecting output.
O
L
O
L
DAC reset control output.
Power supply voltage switch control output for the power amplifier stage.
O
H
O
H
Subwoofer ch mute control output.
TX-SR806/SA806
Description
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