Onkyo TX-SA806 Service Manual page 111

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -54
Q8000, Q8001: HY5DU561622ETP (256 Mbit DDR SDRAM)
BLOCK DIAGRAM
CLK
/CLK
CKE
Command
/CS
Decoder
/RAS
/CAS
/WE
ADD
BA
PIN CONFIGURATION
Bank
Control
Mode
Row
Register
Decoder
Address
Column Address
Buffer
Counter
CLK,
/CLK
1
VDD
DQ0 2
VDDQ 3
4
DQ1
DQ2 5
VSSQ 6
DQ3 7
8
DQ4
VDDQ 9
DQ5 10
11
DQ6
VSSQ 12
DQ7 13
14
NC
Top View
VDDQ 15
LDQS 16
66 pin TSOP
17
NC
VDD 18
NC 19
LDM 20
21
/WE
/CAS 22
/RAS 23
24
/CS
NC 25
BA0 26
27
BA1
A10/AP 28
A0 29
30
A1
31
A2
A3 32
VDD 33
Write Data Register 16
2-bit Prefetch Unit
32
4Mx16 / Bank0
4Mx16 / Bank1
32 16
4Mx16 / Bank2
4Mx16 / Bank3
Column Decoder
Data Strobe
CLK_DLL
Transmitter
LDQS Data Strobe
UDQS Receiver
DLL
Block
Mode
Register
66 VSS
65 DQ15
64
VSSQ
63 DQ14
62 DQ13
61
VDDQ
60
DQ12
59 DQ11
58 VSSQ
57
DQ10
56 DQ9
55 VDDQ
54
DQ8
53 NC
52 VSSQ
51
UDQS
50 NC
49 VREF
48
VSS
47
UDM
46 /CLK
45 CLK
44
CKE
43 NC
42 A12
41
A11
40 A9
39 A8
38
A7
37 A6
36 A5
35
A4
34
VSS
TX-SR806/SA806
LDQS, UDQS
LDM, UDM
DQ[0:15]
LDQS, UDQS