Onkyo TX-SA806 Service Manual page 125

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -68
Q5: AK4388ET (192kHz 24-bit 2ch DAC )
BLOCK DIAGRAM
DEM
SMUTE
Control
ACKS
Port
DIF0
DIF1
LRCK
Audio
Data
BICK
Interface
SDTI
RSTN
TERMINAL DESCRIPTION
No. Pin Name
1 MCLK
2 BICK
3
SDTI
4
LRCK
5
RSTN
6
SMUTE
7
ACKS
8
DIF0
9
DIF1
10 AOUTR
11 AOUTL
12 VCOM
13 VSS
14 VDD
15 DEM
16 DZF
MCLK
Clock
De-emphasis
Divider
Control
8X
Modulator
Interpolator
8X
Interpolator Modulator
I/O Function
Master Clock Input Pin
I
Audio Serial Data Clock Pin
I
Audio Serial Data Input Pin
I
L/R Clock Pin
I
Reset Mode Pin
I
Soft Mute Pin in parallel mode
I
" H" : Enable, " L " : Disable
Auto Setting Mode Pin
I
" L " : Manual Setting Mode,
I Audio Data Interface Format Pin
I Audio Data Interface Format Pin
O Rch Analog Output Pin
O Lch Analog Output Pin
O Common Voltage Pin, VDD/2
- Ground Pin
- Power Supply Pin
O De-emphasis Mode Pin
O Zero Input Detect Pin
PIN CONFIGURATION
VDD
MCLK
VSS
BICK
VCOM
SDTI
LRCK
DZF
RSTN
SMUTE
SCF
ACKS
AOUTL
LPF
DIF0
SCF
AOUTR
LPF
" H" : Auto Setting Mode
TX-SR806/SA806
1
16 DZF
2 15
DEM
3 14
VDD
Top
4 13 VSS
View
5 12 VCOM
6 11 AOUTL
7 10 AOUTR
8 9 DIF1