Dalsa Spyder3 SG-34-04k80-00-R User Manual page 75

Spyder3 SG-34 GigE Vision Color Manual
Trigger Mode
Ind icates how a triggered pu lse generator w ill hand le its triggers. The possible settings are:

Triggered on rising edge: Ind icates if a triggered pu lse generator is triggered on the rising ed ge of an
inpu t

Triggered on high level: Ind icates is a triggered pu lse generator is triggered on the high level of an inpu t

Triggered on falling edge: Ind icates if a triggered pu lse generator is triggered on the fa lling ed ge of an
inpu t

Triggered on rising AN D falling edges: Ind icates if a triggered pu lse generator is triggered on the rising
ed ge of an inpu t and on the falling ed ge of an inpu t

Triggered on low level: Ind icates if a triggered pu lse generator is trigg ered on the low level of an inpu t
Pulse Period (ns)
Disp lays the valu e of the param eter, in nanosecond s, of a com plete d elay -w id th cycle of the pu lse generator.
This valu e is com pu ted every tim e the d elay, w id th or granu larity is m od ified and is available regard less of the
period ic m od e.
Pulse Frequency (Hz)
Disp lays the frequ ency of the pu lse generator. This valu e is com pu ted every tim e the d elay, w id th or
granu larity is m od ified and is available regard less of the period ic m od e.
Pulse Generator Timing
Positive Pulse Generated from a Rising Edge Trigger
Negative Pulse Generated from a Level High Trigger
softw are can generate tw o internal signals u sing the interna l pu lse generators. The behavior of each of these
tw o pu lse generators is d efined by a d elay and a w id th. As show n in the accom p anying d iagram s, the d elay is
the tim e betw een the trigger and the pu lse transitions. The w id th is the tim e the pu lse stays at t he active level
before transitioning. The period ic m od e, the d elay d eterm ines the low tim e of the pu lse.
Each pu lse generator generates a signal that can be u sed as an inpu t to the GPIO Control Block. A triggered
pu lse generator need s an inp u t signal that com es from an ou tpu t of the GPIO Control Block.
Note:
There is one clock cycle betw een the outpu t signal of a pu lse generator and the ou tpu ts of the GPIO
Control Block.
The labels for the inpu ts from the pu lse generators in the GPIO Control Block p rogram m ing langu ages are:

I7, for pu lse generator 0
Teledyne DALSA
Trigger
Pulse_Out
pulse_delay
Trigger
Pulse_Out
pulse_delay pulse_width
pulse_width
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The
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