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1
Quick Start Guide
2
1. Connect the I
C signal generation and interface board to a computer's parallel port.
2. Apply 2.7V to 5.5V power supply's positive output to the "VDD" pin on jumper "VDD GND". Connect
the power supply's ground return to the "GND" pin also on the aforementioned jumper.
3. Connect the supplied 6-wire (one pin is a No Connect) cable between the I
interface board and the 6-pin connector (I
demonstration board. If logic levels other than those set by V
connected and a separate supply applied to the 2–pin header with the I2CVDD pin, with respect to
ground.
4. Headphone amplifier output mode: Apply a stereo input audio signal to jumpers Left Input and Right
Input. Apply the sources' +input pins and GND pins, respectively, to the demonstration board.
5. Connect a load (≥16Ω) to header HPL (left headphone) and another load (≥16Ω) to header HPR (right
headphone). The HPL pin and HPR pin carries the output signals from the two amplifiers, and each of
the other pins connecting to ground making this configuration single-ended connections.
6. Differential mono amplifier output mode: Apply a mono differential input audio signal to jumper Mono
Input. Apply the sources' +input and –input to the middle two pins of the 4-pin jumper. The two outer
pins are connected to ground, which are used when the mono input is configured as single-ended
instead of differential.
7. Connect the 32Ω load across the two pins (differential) of the Speaker jumper on the demonstration
board.
8. Apply power. Make measurements. Enjoy the sound.
2
Introduction
To help you investigate and evaluate the LM49100's performance and capabilities, a fully populated
demonstration board is available from the Texas Instruments Audio Products Group. This board is shown
in
Figure
1. Connected to an external power supply (2.7V to 5.5V), a signal source and an I
(or signal source), the LM49100 demonstration board easily demonstrate the amplifier's features.
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SNAA043A – October 2007 – Revised May 2013
Submit Documentation Feedback
AN-1622 LM49100 Evaluation Board»
2
C Interface; one pin is a No Connect) on the LM49100
Copyright © 2007–2013, Texas Instruments Incorporated
User's Guide
SNAA043A – October 2007 – Revised May 2013
2
C signal generation and
are required, jumper J1 needs to be
DD
AN-1622 LM49100 Evaluation Board»
2
C controller
1

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Summary of Contents for Texas Instruments AN-1622 LM49100

  • Page 1 Introduction To help you investigate and evaluate the LM49100's performance and capabilities, a fully populated demonstration board is available from the Texas Instruments Audio Products Group. This board is shown Figure 1. Connected to an external power supply (2.7V to 5.5V), a signal source and an I C controller (or signal source), the LM49100 demonstration board easily demonstrate the amplifier's features.
  • Page 2: General Description

    1.7V ≤ V C ≤ 5.5V HP ≤ V C ≤ V Temperature Range –40°C ≤ T ≤ 85°C AN-1622 LM49100 Evaluation Board» SNAA043A – October 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 3: Board Features

    LM49100 Demonstration Board schematic. Refer to Table 1 for a list of the connections and their functions. SNAA043A – October 2007 – Revised May 2013 AN-1622 LM49100 Evaluation Board» Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 4 Address Setting Used to set the address of the device. Normally set at “Low” on the demonstration board. AN-1622 LM49100 Evaluation Board» SNAA043A – October 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 5: Power Supply Sequencing

    2.2μF power supply bypass capacitor should be connected as physically close as possible to the V LS pin. SNAA043A – October 2007 – Revised May 2013 AN-1622 LM49100 Evaluation Board» Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 6: Bill Of Materials

    Figure 8 is the bottom layer, and Figure 9 is the bottom silkscreen layer. AN-1622 LM49100 Evaluation Board» SNAA043A – October 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 7 Demonstration Board PCB Layout www.ti.com Figure 4. Top Overlay Figure 5. Top Layer SNAA043A – October 2007 – Revised May 2013 AN-1622 LM49100 Evaluation Board» Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 8 Demonstration Board PCB Layout www.ti.com Figure 6. Upper Inner Layer Figure 7. Lower Middle Layer AN-1622 LM49100 Evaluation Board» SNAA043A – October 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 9 Demonstration Board PCB Layout www.ti.com Figure 8. Bottom Layer Figure 9. Bottom Overlay SNAA043A – October 2007 – Revised May 2013 AN-1622 LM49100 Evaluation Board» Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 10 = 5V, R = 32Ω, P = 25mW BW = 22kHz, Loudspeaker, Mode 1 BW = 22kHz, Headphone, Mode 4, 7 AN-1622 LM49100 Evaluation Board» SNAA043A – October 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 11 = 32Ω, f = 1kHz = 8Ω, f = 1kHz BW = 22kHz, HP, Mode 4 BW = 22kHz, LS , Mode 1 SNAA043A – October 2007 – Revised May 2013 AN-1622 LM49100 Evaluation Board» Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 12 = Headphone Amplifier gain; R = Right input signal; L = Left input signal; SD = Shutdown; M = Mono input signal AN-1622 LM49100 Evaluation Board» SNAA043A – October 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 13 −15 −7.5 −13.5 −6 −12 −4.5 −10.5 −3 −9 −1.5 −7.5 −6 −4.5 −3 −1.5 10.5 13.5 16.5 10.5 SNAA043A – October 2007 – Revised May 2013 AN-1622 LM49100 Evaluation Board» Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 14 The 8 bits of data are sent next, most significant bit first. Each data bit should be valid while the clock level is stable HIGH. AN-1622 LM49100 Evaluation Board» SNAA043A – October 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 15 C interface are dictated by a microcontroller or microprocessor that is operating at a lower supply voltage than the main battery of a portable system. SNAA043A – October 2007 – Revised May 2013 AN-1622 LM49100 Evaluation Board» Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 16: Power Dissipation

    The maximum internal power dissipation of the LM49100 occurs when all three amplifiers pairs are simultaneously on; and is given by: DMAX-TOTAL DMAX-LS DMAX-HPL DMAX-HPR AN-1622 LM49100 Evaluation Board» SNAA043A – October 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 17: Power Supply Bypassing

    ), typical 12.5kΩ, and the input capacitor (C ) produce a high pass filter cutoff frequency that is found using: = 1 / (2πR SNAA043A – October 2007 – Revised May 2013 AN-1622 LM49100 Evaluation Board» Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 18 Please refer to AN-1112 DSBGA Wafer Level Chip Scale Package (SNVA009) for possible updates to the μSMD package information. Demo Board Schematic AN-1622 LM49100 Evaluation Board» SNAA043A – October 2007 – Revised May 2013 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 19: Revision History

    Revision History www.ti.com Revision History Date Description 10/1907 Initial release. SNAA043A – October 2007 – Revised May 2013 AN-1622 LM49100 Evaluation Board» Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated...
  • Page 20: Important Notice

    IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.

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