Texas Instruments LMG1205HBEVM User Manual
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Texas Instruments LMG1205HBEVM User Manual

Texas Instruments LMG1205HBEVM User Manual

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Using the LMG1205HBEVM
User's Guide
Literature Number: SNVU552
March 2017

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Summary of Contents for Texas Instruments LMG1205HBEVM

  • Page 1 Using the LMG1205HBEVM User's Guide Literature Number: SNVU552 March 2017...

  • Page 2: Table Of Contents

    EVM Connections ........................Test Procedure ....................Power-Up Procedure ....................Shutdown Procedure ......................Switching Waveforms ................EVM Assembly Drawing and PCB Layout ......................... List of Materials Table of Contents SNVU552 – March 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...
  • Page 3 Zoom in of the SW Node Running at 50% Duty Cycle ..... 48-V to 5-V Synchronous Buck Converter Operation Showing Inputs, SW Node, and V ..............LMG1205HBEVM-10 Top Layer and Components ..............LMG1205HBEVM-10 Bottom Layer and Components List of Tables ..............

  • Page 4: Preface

    Any other use and/or application are strictly prohibited by Texas Instruments. If you are not suitably qualified, you should immediately stop from further use of the HV EVM.
  • Page 5 Board should be handled with care by a professional. For safety, use of isolated test equipment with overvoltage and overcurrent protection is highly recommended. SNVU552 – March 2017 General TI High Voltage Evaluation User Safety Guidelines Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 6: Description

    LMG1205. Description The LMG1205HBEVM evaluation module is a small, easy-to-use power stage with an external PWM signal. The board can be configured as a buck converter, boost converter, or other converter topology using a half bridge.

  • Page 7: Typical Applications

    Input voltage for 5-V VDD LDO PWM input voltage Half-bridge output current Half-bridge output power LMG1205 and GaN FETs T ≤ 125ºC Switching frequency SNVU552 – March 2017 Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 8: Evm Schematic

    EVM Schematic www.ti.com EVM Schematic Figure 1 shows the schematic of the evaluation module. Figure 1. LMG1205HBEVM Schematic Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM SNVU552 – March 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 9: Test Setup

    This section describes the EVM hardware and outlines the procedure to set it up for evaluation. Figure 2 Figure 3 show the top and bottom views of the LMG1205HBEVM, respectively. Figure 2. LMG1205HBEVM Board Top View Figure 3. LMG1205HBEVM Board Bottom View...

  • Page 10: List Of Test Points

    Figure 6. HS Test Point (TP12) Figure 7. HB Test Point (TP4) Figure 8. HO Test Point (TP3) Figure 9. LO Test Point (TP11) Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM SNVU552 – March 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 11: List Of Terminals

    10. The top-most pin (J2-pin1) in this view is the positive input of the PWM supply and the remaining three pins are connected to GND in the default assembly for the board. SNVU552 – March 2017 Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 12: Test Procedure

    EVM. Test Procedure This section describes different tests that can be performed using the LMG1205HBEVM in its default buck-converter configuration. Never leave a powered EVM unattended for any length of time. Also, the unit should never be handled while power is applied to it. A high-voltage power supply with overcurrent protection enabled and/or connected in series with a properly-rated use is recommended for safe operation.

  • Page 13: Shutdown Procedure

    = VSS = 0 V, f = 5 MHz Figure 11. Input and Output Waveforms Showing the Dead Time SNVU552 – March 2017 Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 14: Zoom In Of The Sw Node Running At 50% Duty Cycle

    = 1 MHz, V = 5 V, No Load Figure 13. 48-V to 5-V Synchronous Buck Converter Operation Showing Inputs, SW Node, and V Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM SNVU552 – March 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 15: Evm Assembly Drawing And Pcb Layout

    EVM Assembly Drawing and PCB Layout Figure 14. LMG1205HBEVM-10 Top Layer and Components Figure 15. LMG1205HBEVM-10 Bottom Layer and Components SNVU552 – March 2017 Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...

  • Page 16: List Of Materials

    Unless otherwise noted, all parts may be substituted with equivalents EPC2001 is an acceptable substitute and some EVMs may be assembled using this part number Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM SNVU552 – March 2017 Submit Documentation Feedback...
  • Page 17 CAP, CERM, 2.2 µF, 100 V, ±10%, X7R, 1210 C1210C225K1RACTU Kemet RES, 0 Ω, 5%, 0.063 W, 0402 CRCW04020000Z0ED Vishay-Dale No alternate component manufacturer SNVU552 – March 2017 Using the LMG1205HBEVM GaN Half-Bridge Power Stage EVM Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...
  • Page 18 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
  • Page 19 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
  • Page 20 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/ /www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 3.4 European Union 3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a low-voltage power-supply network that supplies buildings used for domestic purposes.
  • Page 21 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2017, Texas Instruments Incorporated...
  • Page 22 IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products;...

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