Power Supply Sequencing; Pcb Layout Guidelines - Texas Instruments AN-1622 LM49100 User Manual

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Header or Jumper Designation
2
I C Interface
Speaker
HPR
HPL
8

Power Supply Sequencing

The LM49100 uses two power supply voltages: V
digital control logic high voltage level. To ensure proper functionality, apply V
one power supply is used, V
channels shutdown, the volume control set to minimum, and the mute function active.
2
9 I C Signal Generation Board and Software
2
The I C signal generation and interface board, along with the LM49100 software, will generate the address
byte and the data byte used in the I
interface board, please plug it into a PC's parallel port (on either a notebook or a desktop computer).
The software comes with an installer. To install, unzip the file titled "LM49100_Software." After the file
unzips, double-click the "setup.exe" file. After it launches, follow the installer's instructions. Setup will
create a folder named "LM49100" in the "Program" folder on the "C" disk (if the default is used) along with
a shortcut of the same name in the "Programs" folder in the "Start" menu.
The LM49100 program includes controls for the amplifier's volume control, individual channel shutdown,
and the mute function. The control program's on-screen user interface is shown in
The Default button is used to return the LM49100 to its power-on reset state: minimum volume setting,
shutdown on both amplifiers active, and mute active.
The LM49100's stereo VOLUME CONTROL has 32 steps and a gain range of –76dB to 18dB. It is
controlled using the slider located at the bottom of the program's window. Each time the slider is moved
from one tick mark to another, the program updates the amplifier's volume control.
LEFT CHANNEL, BOTH CHANNELS, and RIGHT CHANNEL controls each have two buttons. For the
left and right channel control, the "ON" button activates its respective channel, whereas the "OFF" button
places its respective channel in shutdown mode. Selecting the BOTH CHANNELS "ON" button
simultaneously activates both channels, whereas selecting the "OFF" button places channels in shutdown
mode.
10

PCB Layout Guidelines

This section provides general practical guidelines for PCB layouts that use various power and ground
traces. Designers should note that these are only "rule-of-thumb" recommendations and the actual results
are predicated on the final layout.
10.1 Power and Ground Circuits
Star trace routing techniques (returning individual traces back to a central point rather than daisy chaining
traces together in a serial manner) can have a major positive impact on low-level signal performance. Star
trace routing refers to using individual traces that radiate from a signal point to feed power and ground to
each circuit or even device. This technique may require greater design time, but should not increase the
final price of the board.
For good THD + N and low noise performance and to ensure correct power-on behavior at the maximum
allowed supply voltage, a local 2.2μF power supply bypass capacitor should be connected as physically
close as possible to the V
SNAA043A – October 2007 – Revised May 2013
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Table 1. LM49100 Demonstration Board Connections (continued)
This is the input connection for the I
demonstration board has an adjacent I
Two-pin header used to connect the "+" and "-" terminals of the mono speaker.
This is the connection to the amplifier's single-ended, ground referenced right channel
output. The "HPR" label refers to the output pin and "GND" is the corresponding ground.
This is the connection to the amplifier's single-ended, ground referenced left channel
output. The "HPL" label refers to the output pin and "GND" is the corresponding ground.
2
and I CV can be connected together. The part will power-up with both
DD DD
2
C control data transaction. To use the I
LS pin.
DD
Copyright © 2007–2013, Texas Instruments Incorporated
Function or Use
2
C serial clock and serial data signals. The
2
C label identifying each pin.
for the analog circuitry and I
DD
AN-1622 LM49100 Evaluation Board»
Power Supply Sequencing
2
CV , which defines the
DD
2
first, followed by I CV
DD
2
C signal generation and
Figure 2.
. If
DD
5