Motorola MVME167 Series User Manual page 78

D
data bus structure 4-1
data circuit-terminating
(DCE) A-1
data terminal equipment (DTE) A-1
DCE (data circuit-terminating equip-
ment) A-1
debug monitor
MVME167Bug) 2-2, 2-6, 3-1, 3-30
debugging package 1-7, 3-30
decimal number 1-9
default values
registers 3-30
detailed I/O memory maps 3-6
diagnostics 1-6
DMA 4-5, 4-6
DRAM (dynamic RAM) 4-3
DRAM base address 2-7
DS1 - DS4 3-2
DS1210S 4-2
DTE (data terminal equipment) A-1
dynamic RAM (DRAM) 4-3
E
ECC (error checking and correction)
DRAM mezzanine module block
diagram 4-13
EIA-232-D 4-5
EIA-232-D interconnections A-1, A-2
EIA-232-D standard A-1
EPROM sockets 1-6
EPROM(s) 2-6, 3-4, 3-30, 4-2
equipment required 1-6
errata sheets, chip 3-6
Ethernet (see 82596CA and LAN) 2-8, 4-6
I
Ethernet address 3-27, 3-28
N
Ethernet interface 4-6
D Ethernet station address 4-6
Ethernet transceiver interface 4-6
E
extended addressing 2-7
X
IN-2
equipment
(see 167Bug and
F
factory jumper settings 2-2
FCC compliance 1-4
features 1-2
forced air cooling 1-3
front panel 3-1
front panel indicators (DS1- DS4) 3-2
functional description 4-1
fuse F1 2-8
fuse F2 2-8
G
GCSR (Global Control and Status Regis-
ters) (see VMEchip2 GCSR) 2-8,
3-30
GCSR board control register 3-30
general description 1-5
general information 1-1
general purpose readable jumpers on
header J1 2-2
global bus timeout 2-8
Global Control and Status Registers (GC-
SR) (see VMEchip2 GCSR) 2-8,
3-30
grounding A-6
H
half duplex A-3
handshaking A-1, A-3
hardware interrupts
software-programmable 4-8
hardware preparation 2-1
hardware preparation and installation
2-1
hexadecimal character 1-9
I
I/O interfaces 4-5
IACK (interrupt acknowledge) 2-7
installation instructions 2-6
interrupt acknowledge (IACK) 2-7
interrupt acknowledge map 3-28
MVME167 Single Board Computer User's Manual
Index