Motorola M68CPU32BUG User Manual page 44

BV
EXAMPLES Assume memory from $6000 to $602F is as indicated.
CPU32Bug>MD 6000:30;B <CR>
00006000 4E71 4E71 4E71 4E71
00006010 4E71 4E71 4E71 4E71
00006020 4E71 4E71 4E71 4E71
CPU32Bug>BV 6000 601F 4E71 <CR>
Effective address: 00006000
Effective address: 0000601F
CPU32Bug>
Assume memory from $5000 to $502F is as indicated.
CPU32Bug>MD 5000:30;B<CR>
00005000 0000 0000 0000 0000
00005010 0000 0000 0000 0000
00005020 0000 0000 0000 0000
CPU32Bug>BV 5000:30,0;B<CR>
Effective address: 00005000
Effective count : &48
0000502A|4A 0000502B|FB
0000502E|4A 0000502F|FB
CPU32Bug>
Assume memory from $7000 to $702F is as indicated.
CPU32Bug>MD 7000:18 <CR>
00007000 0000 0001 0002 0003
00007010 0008 FFFF 000A 000B
00007020 0010 0011 0012 0013
CPU32Bug>BV 7000:18,0,1 <CR>
Effective address: 00007000
Effective count : &24
00007012|FFFF
CPU32Bug>
M68CPU32BUG/D REV 1
Block of Memory Verify
4E71 4E71 4E71 4E71
4E71 4E71 4E71 4E71
4E71 4E71 4E71 4E71
Default size is Word
Verify successful, nothing printed.
0000 0000 0000 0000
0000 0000 0000 0000
0000 4AFB 4AFB 4AFB
0000502C|4A 0000502D|FB
Mismatches are printed out.
0004 0005 0006 0007 ................
000C 000D 000E 000F ................
0014 0015 0016 0017 ................
Default size is Word.
Mismatches are printed out.
3-14
DEBUG MONITOR COMMANDS
NqNqNqNqNqNqNqNq
NqNqNqNqNqNqNqNq
NqNqNqNqNqNqNqNq
................
................
..........J.J.J.
BV