Motorola M68CPU32BUG User Manual page 181

Table C-1. CPU32Bug Customization Area (continued)
Offset Default Value
$70 $06
$71 $FF
Enabling the software watchdog with a short timeout period may cause
CPU32Bug itself to fail when the watchdog is not serviced soon enough. The
failure is constant RESETing before the CPU32Bug> prompt appears, or
RESETing during execution of particular commands.
Disabling the bus monitor timeout period causes CPU32Bug to lock-up on
any unterminated bus cycle, i.e., accessing non-existant memory.
Changing the bus monitor timeout period to too small of a value can cause
problems with slow memory or if the 8-bit bus mode is enabled upon booting.
$72-73 $8000
$74-77 $FFFFFFFF
M68CPU32BUG REV 1
Mnemonic
SYPCR_OR Value ORed with contents of SYPCR register at power-
up/reset.
SYPCR_AND Value ANDed with result value after SYPCR_OR and
stored back into SYPCR. This allows user control of the
write-once bits in the SYPCR, i.e., software watchdog,
halt monitor, and bus monitor.
NOTE
FCRYSTAL Crystal frequency in Hz (8000 = 32,768). SCI baud
rates are calculated using this value.
FEXTAL External clock frequency (in hertz). Only used when
MODCK is held low during RESET to enable the
EXTAL pin. SCI baud rates are calculated using this
value.
C-7
USER CUSTOMIZATION
Description