Bcc Rev. A Chip Selection Summary; C-3. Rev. A Chip Selection Summary - Motorola M68CPU32BUG User Manual

C.5 BCC REV. A CHIP SELECTION SUMMARY
Table C-3 covers Rev. A of the M68332BCC Business Card Computer and M68332PFB
Platform Board.
Signal Board/Chip
CSBOOT BCC U4
CS0 BCC U3
CS1 BCC U2
CS2 PFB U1/U3
CS3 PFB U1
CS4 PFB U4
CS5 PFB U2
CS6 PFB U5
CS7 <unused>
CS8 PFB
CS9 <unused>
CS10 PFB U3
U1/U3 = 120 nsec RAM with fast termination.
U2/U4 = ROM laid-out wrong, can only be configured as 120 nsec RAM.
M68CPU32BUG REV 1
Table C-3. Rev. A Chip Selection Summary
CPU32Bug EPROM
read/write enable for MSB=UPPER=EVEN
read/write enable for LSB=LOWER=ODD
read enable for MSB/LSB=BOTH
write enable for LSB=LOWER=ODD
read enable for MSB=UPPER=EVEN
read enable for LSB=LOWER=ODD
chip enable for MC68881/882
ABORT pushbutton autovector
write enable for MSB=UPPER=EVEN
cut/jump U3-27 from CS4 to CS10 required.
NOTE
C-15
Description
USER CUSTOMIZATION
Memory Type
RAM
RAM
RAMS
RAM
RAM/EPROM
RAM/EPROM
RAM.