Power Connections; Timing Connections - National Instruments AT-MIO/AI E Series User Manual

Chapter 4 Signal Connections

Power Connections

Warning: Under no circumstances should you connect these +5 V power pins directly

Timing Connections

Warning: Exceeding the maximum input voltage ratings, which are listed in
AT-MIO/AI E Series User Manual
Two pins on the I/0 connector supply +5 V from the PC power supply
via a self-resetting fuse. The fuse will reset automatically within a few
seconds after the overcurrent condition is removed. These pins are
referenced to DGND and can be used to power external digital circuitry.
• Power rating
to analog or digital ground or to any other voltage source on the
AT E Series board or any other device. Doing so can damage the
AT E Series board and the PC. National Instruments is
damages resulting from such a connection.
Tables 4-1 through 4-4, can damage the AT E Series board and the PC.
National Instruments is
signal connections.
All external control over the timing of your AT E Series board is routed
through the 10 programmable function inputs labeled PFI0 through
PFI9. These signals are explained in detail in the next section,
Programmable Function Input Connections. These PFIs are
bidirectional; as outputs they are not programmable and reflect the state
of many data acquisition, waveform generation, and general-purpose
timing signals. There are five other dedicated outputs for the remainder
of the timing signals. As inputs, the PFI signals are programmable and
can control any data acquisition, waveform generation, and
general-purpose timing signals.
The data acquisition signals are explained in the Data Acquisition
Timing Connections section later in this chapter. The waveform
generation signals are explained in the Waveform Generation Timing
Connections section later in this chapter. The general-purpose timing
signals are explained in the General-Purpose Timing Signal Connections
section later in this chapter.
All digital timing connections are referenced to DGND. This reference
is demonstrated in Figure 4-12, which shows how to connect an
+4.65 VDC to +5.25 VDC at 1 A combined total
for both pins
liable for any damages resulting from such
NOT
4-30
liable for
NOT
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