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CHAPTER 8: DEBUGGER
Measuring execution cycles/execution time
(1) Execution cycle counter and measurement mode
The ICE contains a 31-bit execution cycle counter allowing you to measure the program execution
time or the number of bus cycles executed. The measurement mode (time or bus cycle) can be selected
using the md command. In the initial debugger settings, the bus cycle mode is selected.
The following lists the maximum values that can be measured by the execution cycle counter:
Execution time mode: 2,147,483,647 µsec = approx. 36 min.
Bus cycle mode:
(2) Displaying measurement results
The measurement result is displayed in the [Register] window. This display is cleared during program
execution and is updated after completion of execution. If the [Register] window is closed, the
measurement result can be displayed in the [Command] window using the rd command. The execu-
tion results of single-stepping are also displayed here.
If the counter's maximum count is exceeded, the system indicates "over flow".
(3) Hold mode and reset mode
In the initial debugger settings, the execution cycle counter is set to hold mode. In this mode, the
measured values are combined until the counter is reset.
The reset mode can be set by the md command. In this mode, the counter is reset each time the
program is executed. In successive execution, the counter is reset when the program is made to start
executing by entering the g command and measurement is taken until the execution is terminated
(beak occurs). (The same applies for the gr command except that the counter is reset simultaneously when
the CPU is reset. Consequently, the counter operates the same way in both hold and reset modes.)
In single-stepping, the counter is reset when the program is made to start executing by entering the s
or n command and measurement is taken until execution of a specified number of steps is completed.
The counter is reset every step if execution of only one step is specified or execution is initiated by a
tool bar button or menu command.
(4) Resetting execution cycle counter
The execution cycle counter is reset in the following cases:
• When the CPU is reset with the rst command, [Reset] in the [Run] menu, or the [Reset] button
• When the gr command or [Go from Reset] in the [Run] menu is executed
• When the execution cycle counter mode is switched over by the md command (between execution
time and bus cycle modes or between hold and reset modes)
• When program execution is started in reset mode
Resetting the CPU
The CPU is reset when the gr command is executed, or by executing the rst command.
When the CPU is reset, the internal circuits are initialized as follows:
(1) Internal registers of the CPU
PC
... 0x0110
A, B
... 0xa
X, Y, QUEUE
... 0xaaaa
F
... 0b0000
SP1, SP2, EXT
... 0xaa
(2) The execution cycle counter is reset to 0.
(3) The [Source] and [Register] windows are redisplayed.
Because the PC is set to 0x0110, the [Source] window is redisplayed beginning with that address.
The [Register] window is redisplayed with the internal circuits initialized as described above.
The data memory contents are not modified.
148
2,147,483,647 cycles
EPSON
(error = ±1 µsec)
(error = ±0)
S5U1C63000A MANUAL
(S1C63 FAMILY ASSEMBLER PACKAGE)
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