The figures in this chapter show configurations with DAE2P/DAE3Ps as
the only disk-array enclosures. Environments with a mix of DAE2 and
DAE2P/DAE3P enclosures follow the same EA, bus balancing, and
cabling conventions whenever possible and practical.
The configuration example in
Model 40 storage processor enclosure (SPE3) below eight DAE3P
disk-array enclosures. Each of the eight devices supports two
completely redundant loops. Note that the external device
connects to the Primary disk enclosure connectors, and
subsequent enclosures connect in an Expansion-to-Primary chain.
LCC B
Bus 1
Bus 0
SPS B
Cabling disk enclosures together — two Fibre Channel buses
Figure 2-6
EA3/Bus 1
EXP
PRI
B
#
EXP
PRI
PRI
EXP
A
#
PRI
EXP
EA2/Bus 1
EXP
PRI
B
#
EXP
PRI
PRI
EXP
A
#
PRI
EXP
EA1/Bus 1
EXP
PRI
B
#
EXP
PRI
PRI
EXP
A
#
PRI
EXP
EA0/Bus 1
EXP
PRI
#
B
EXP
PRI
PRI
EXP
A
#
PRI
EXP
EA3/Bus 0
EXP
PRI
B
#
EXP
PRI
PRI
EXP
A
#
PRI
EXP
EA2/Bus 0
EXP
PRI
B
#
EXP
PRI
PRI
EXP
A
#
PRI
EXP
EA1/Bus 0
EXP
PRI
B
#
EXP
PRI
PRI
EXP
A
#
PRI
EXP
EA0/Bus 0
EXP
PRI
B
#
EXP
PRI
PRI
EXP
A
#
PRI
EXP
Connecting the DAE2P/DAE3P to the back end bus
Installing a DAE2P/DAE3P
Figure 2-6
shows a CX3-series
LCC A
Bus 1
Bus 0
SPS A
EMC3412
2-13