HP Rp3440-4 - 9000 - 0 MB RAM Installation Manual page 48

Installing the System
Installing Additional Components
Memory Loading Rules and Performance Guidelines
• DIMMs must be installed in server load sequence (the first DIMM must be in the first slot, the second
DIMM must be in the second slot, and so on).
• A minimum of 512 MB (2 x 256 MB DIMMs in a model A7136A server) or 1 GB (4 x 256 MB DIMMs in a
model A7136B server) of memory must be installed in a HP 9000 rp3410 server.
• Maximum memory is 6 GB.
• A minimum of two DIMMs (one pair) is required in the model A7136A server.
• A minimum of four DIMMs (one quad) is required in the model A7136B server.
• All DIMMs within a quad must be identical.
• Memory can be ordered in amounts of 1 GB (4 x 256 MB), 2 GB (4 x 512 MB), 4 GB (4 x 1 GB), 8 GB (4 x 2
GB), and 16 GB (4 x 4 GB).
• Memory is loaded across both memory busses (two DIMMs on each bus) to ensure maximum bandwidth
and performance.
• Total memory bandwidth is 8.5 GB/s, split across two 4.25 GB/s memory buses.
• Open page memory latency is 80 nanoseconds.
rp3440 Memory Configuration
The HP 9000 rp3440 supports DDR SDRAM DIMMs with ECC and chip spare protection. This server has 12
DIMM slots, but maximum system memory is 32 GB due to cooling limitations. Memory must be installed as
quads (groups of four). This allows memory configurations of four, eight, or twelve DIMMs. Thus, the HP 9000
rp3440 server must include a minimum of 1 GB and can include up to 24 GB of memory in combinations of
256 MB, 512 MB, 1 GB, and 2 GB DIMMs, or 32 GB of memory consisting of eight 4 GB DIMMs. Different size
DIMMs can be installed in the server (except when 4 GB DIMMs are used), but all four DIMMs in a quad
must be identical.
Memory Loading Rules and Performance Guidelines
• Minimum memory is 1 GB (4 x 256 MB).
• Maximum memory is 32 GB (8 x 4 GB installed in the first eight slots—the remaining slots must remain
empty if 4 GB DIMMs are installed).
• Memory DIMMs must be installed in groups of four (quads).
• All DIMMs within a quad must be identical.
• Memory must be loaded in the specific order outlined on the system board.
• Memory can be ordered in amounts of 512 MB (2 x 256 MB), 1 GB (4 x 256 MB), 2 GB (4 x 512 MB), 4 GB
(4 x 1 GB), 8 GB (4 x 2 GB), and 16 GB (4 x 4 GB).
• Each quad of memory is loaded across both memory buses (two DIMMs on each bus) to ensure maximum
bandwidth and performance.
• Total memory bandwidth is 8.5 GB/s, split across two 4.25 GB/s memory buses.
• Open page memory latency is 80 nanoseconds.
The memory subsystem supports chip-spare functionality. Chip spare enables an entire SDRAM chip on a
DIMM to be bypassed (logically replaced) in the event that a multi-bit error is detected on that SDRAM.
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Chapter 1