Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 4 REV 2.3 Manual page 446

PSLLW/PSLLD/PSLLQ—Packed Shift Left Logical (continued)
Virtual-8086 Mode Exceptions
#GP
#UD
#NM
#MF
#PF(fault-code)
#AC(0)
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Volume 4: IA-32 Intel MMX™ Technology Instruction Reference
If any part of the operand lies outside of the effective address space
from 0 to FFFFH.
If EM in CR0 is set.
If TS in CR0 is set.
If there is a pending FPU exception.
If a page fault occurs.
If alignment checking is enabled and an unaligned memory
reference is made.
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