NXP Semiconductors SJA1110 User Manual
NXP Semiconductors SJA1110 User Manual

NXP Semiconductors SJA1110 User Manual

Multi-gig secure evaluation board

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UM12269
SJA1110 multi-gig secure evaluation board
Rev. 1.0 — 28 April 2025
Document information
Information
Keywords
Abstract
Content
SJA1110, SJA1110A, SJA1110B, SJA1110C, SJA1110D, SJA1110-MGS-EVM, evaluation board,
TJA1121, TJA1104, SMI, SPI, MACsec, TC10
This document describes the operation of the SJA1110-MGS-EVM evaluation board.
User manual

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Summary of Contents for NXP Semiconductors SJA1110

  • Page 1 SJA1110 multi-gig secure evaluation board Rev. 1.0 — 28 April 2025 User manual Document information Information Content Keywords SJA1110, SJA1110A, SJA1110B, SJA1110C, SJA1110D, SJA1110-MGS-EVM, evaluation board, TJA1121, TJA1104, SMI, SPI, MACsec, TC10 Abstract This document describes the operation of the SJA1110-MGS-EVM evaluation board.
  • Page 2 UM12269 NXP Semiconductors SJA1110 multi-gig secure evaluation board IMPORTANT NOTICE For engineering development or evaluation purposes only NXP provides the product under the following conditions: This evaluation kit is for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed-circuit board to make it easier to access inputs, outputs and supply terminals.
  • Page 3: Introduction

    MGS-EVM is a compact, cost-effective multi-gig secure evaluation board, ideal for automotive Ethernet use cases. Consisting of the SJA1110 switch along with TJA1121 and TJA1104 PHYs, the board demonstrates MACsec security on both PHYs and enables rapid prototyping with integrated software examples based on Real-Time Drivers (RTDs).
  • Page 4: Getting To Know The Hardware

    UM12269 NXP Semiconductors SJA1110 multi-gig secure evaluation board 4 Getting to know the hardware 4.1 Board image A top view of the SJA1110-MGS-EVM is shown in Figure 1. Board dimensions are 105 mm x 118 mm. Figure 1. SJA1110-MGS-EVM UM12269 All information provided in this document is subject to legal disclaimers.
  • Page 5: Board Features

    – 1x SFP+ cage – 1x 2.5G Ethernet port using the TJA1230 automotive Ethernet PHY (not available on Rev. 1.0 of the board) – JTAG connector to access ARM core of SJA1110 – Several LEDs controlled by HW and SW displaying useful information –...
  • Page 6: Board Overview

    UM12269 NXP Semiconductors SJA1110 multi-gig secure evaluation board 4.4 Board overview The main components and ports on the SJA1110-MGS-EVM are indicated and labelled in Figure 3. Jumpers and DIP switches are highlighted in Figure 4 and described in Table 1...
  • Page 7 In NVM boot mode, the SJA1110 firmware boots from the external Flash memory on the board. In SDL boot mode, the SJA1110 waits for a companion device to load the firmware via the SPI_HAP interface. SPI_HAP is a multiplexed SPI interface used to load firmware onto the device (SPI_HOST, via CS1) and for register-level access (SPI_AP, via CS0).
  • Page 8 12 V supply present hardware 3.3 V USB supply present hardware 3.3 V LED supply present hardware 3.3 V supply for PHYs and SJA1110 present hardware 3.3 V supply for SFP+ cage supply present hardware 1.1 V supply for SJA1110 hardware 2.2 V LDO output from SJA1110 present...
  • Page 9: Phys

    UM12269 NXP Semiconductors SJA1110 multi-gig secure evaluation board Table 6. PHY status LEDs ...continued SW/HW controlled Indicates when lit hardware 3.3 V supply present hardware TJA1121B MDI link-up D102 software TJA1121B SGMII link-up hardware TJA1121A MDI link-up D103 software TJA1121A RGMII link-up...
  • Page 10: Tja1121B

    UM12269 NXP Semiconductors SJA1110 multi-gig secure evaluation board 4.5.2 TJA1121B The TJA1121B is configured automatically via pin strapping. CONFIG6 pin strapping can be changed using the pin header. It controls the following miscellaneous settings: • PHY role (follower or leader) •...
  • Page 11: Tja1121A

    UM12269 NXP Semiconductors SJA1110 multi-gig secure evaluation board 4.5.3 TJA1121A The TJA1121A is configured automatically via pin strapping. CONFIG6 pin strapping can be changed using the pin header. It controls the following miscellaneous settings: • PHY role (follower or leader) •...
  • Page 12: Tja1104B

    UM12269 NXP Semiconductors SJA1110 multi-gig secure evaluation board 4.5.4 TJA1104B The TJA1104B is configured automatically via pin strapping. Pin headers for CONFIG5 and CONFIG6 can be used to change a number of pin strapping settings, as detailed Table Table 11. CONFIG5/6 pin strapping settings...
  • Page 13: Power Supply

    SJA1110 multi-gig secure evaluation board 4.6 Power supply The power supply for the SJA1110-MGS-EVM is built around the VR5510 PMIC to exploit and demonstrate synergies with S32G projects. The board is powered by a single 12 V input. It is advised to use an adapter that can deliver at least 1 A of current.
  • Page 14: Interfaces

    Figure 10. SMI interface 4.7.2 SPI The SPI_PER interface on the SJA1110 is available on pin header J3, allowing another device to be connected to this interface. The SJA1110 be used as SPI leader to this device. A typical use-case would be a cascaded switch architecture with two switches, in which one switch loads the configuration to the seconds switch via SPI.
  • Page 15: Debug Headers

    UM12269 NXP Semiconductors SJA1110 multi-gig secure evaluation board Table 12. GPIO pin extender ...continued Port extender pin Signal Remark P1_0 SW1_P1_LED link LED switch xMII port 1 P1_1 SW1_P2_LED link LED switch xMII port 2 P1_2 SW1_P3_LED link LED switch xMII port 3...
  • Page 16: Revision History

    UM12269 NXP Semiconductors SJA1110 multi-gig secure evaluation board SW1_ERR_N WAKE_IN_OUT SW1_DEVICE_CFG_N LOC_WAKE_IN SW1_DEVICE_SYNC GPIO0_J4 SW1_PTP_CLK GPIO1_J4 SW1_FSI2 GPIO2_J4 SOFT_RESET_N GPIO3_J4 HARD_RESET_N GPIO4_J4 IRQ_PMIC VCC_3V3_S SW1_INT_N aaa-060653 Figure 12. J4 pinning 5 Revision history Table 13. Revision history Document ID Release date Description •...
  • Page 17: Legal Information

    NXP Semiconductors. proprietary technologies supported by NXP products for use in customer’s In no event shall NXP Semiconductors be liable for any indirect, incidental, applications. NXP accepts no liability for any vulnerability. Customer should punitive, special or consequential damages (including - without limitation - regularly check security updates from NXP and follow up appropriately.
  • Page 18: Table Of Contents

    UM12269 NXP Semiconductors SJA1110 multi-gig secure evaluation board Contents Introduction ............3 Finding kit resources and information on the NXP web site ........3 Getting ready ........... 3 Kit contents ............3 Getting to know the hardware ......4 Board image ............4 Board features ...........

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