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EVM User's Guide: DP83826AEVM
DP83826AEVM User's Guide
Description
The DP83826AEVM is designed to evaluate the
functionality and performance of the DP83826A
Ethernet physical layer tranciever. The DP83826A
EVM supports both 10BASE-Te and 100BASE-TX
Ethernet protocols on the media dependent interface
through an RJ-45 connection. This EVM is equipped
with an onboard MSP430 to enable register access on
the DP83826A using USB to MDIO software.
Get Started
1. Configure the board headers to fit your
application.
2. Power the board with an external supply.
3. For issues, reach out to us on the TI E2E forum.
SNLU357 – APRIL 2025
Submit Document Feedback
Features
100Base-TX, 10Base-Te with Auto-Negotiation
and Force Mode
Onboard clock and output clock
Onboard MSP430 for easy MDIO Register Access
Onboard MSP430 for flashing firmware
Single supply or external power supply options
Status LEDs
Fiber Optic transceivers option for MDIO/MDC
EMI/EMC Compliance Testing Completed:
– CISPR 22 Radiated Emissions Class B
– CISPR 22 Conducted Emissions Class B
– IEC 61000-4-2 ESD: ±9kV contact, ±15kV air
– IEC 61000-4-4 EFT: ±4kV
Applications
Factory automation
Robotics and motion control
Motor drives
Grid infrastructure
Building automation
Industrial Ethernet fieldbus
Figure 1-1. DP83826A EVM
Copyright © 2025 Texas Instruments Incorporated
Description
DP83826AEVM User's Guide
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Summary of Contents for Texas Instruments DP83826AEVM

  • Page 1 Description EVM User's Guide: DP83826AEVM DP83826AEVM User's Guide Description Features The DP83826AEVM is designed to evaluate the • 100Base-TX, 10Base-Te with Auto-Negotiation functionality and performance of the DP83826A and Force Mode Ethernet physical layer tranciever. The DP83826A • Onboard clock and output clock EVM supports both 10BASE-Te and 100BASE-TX •...
  • Page 2: Kit Contents

    • (1) 5V - 12V banana jack receptacle and turret 1.3 Specification The figure below shows the power and data path of the DP83826AEVM. Please note this EVM has the fiber optic transceivers depopulated by default. USB Data 5V – 12V...
  • Page 3: Device Information

    In addition, the PWRDN pin controls the DP83826A link up from power-on-reset (POR) and helps with design of asynchronous power-up of the DP83826A and host system-on-a-chip (SoC) or field-programmable- gate-array (FPGA) controller. SNLU357 – APRIL 2025 DP83826AEVM User's Guide Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 4 2 Hardware 2.1 Power Requirements The DP83826AEVM power is supplied by the 5-12V input connection in the image below. Single supply operation uses on-board LDOs to generate the voltages required for operating various sections of the EVM. Power can also be supplied externally to individual voltage rails. The micro-USB supplies power to the on-board LDOs that power all microcontroller related components.
  • Page 5: Test Cases

    Hardware 2.2 Setup The DP83826AEVM default header configuration assumes the user is supplying power to the 5V-12V banana jack or turret input. If the user wants to power the EVM from external sources, power can be supplied directly to pin 2 of J7 (VDDA), J8 (VDDIO), or J9 (Fiber optic transceivers). J23 (5V) is used to supply LDO and PHY using an external 5V power supply.
  • Page 6: Software Installation

    MDIO communication capability. More information on how to access the DP83826A MDIO status and control registers can be found in the USB-2-MDIO Software User's Guide DP83826AEVM User's Guide SNLU357 – APRIL 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 7 For IEC 61000-4-3 RI testing, replacing R37 with a 100Ω resistor was shown to improve performance from 10V/m to 16V/m. Consider adjusting R37 if greater RI performance is needed. SNLU357 – APRIL 2025 DP83826AEVM User's Guide Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 8 - J23 allows the USB VBUS to provide all board power ADJ/BYP 100k 10uF 2.2uF 2.2uF 10uF Sys_5V 470pF 165k Green Figure 5-1. DP83826AEVM Power Schematic DP83826AEVM User's Guide SNLU357 – APRIL 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 9 - May need to increase dielectric thickness between Power and MII signal layers LED_0 4700pF 1.50k Green EARTH_GND LED_2 1.50k Green 4700pF EARTH_GND CLK_OUT Green Green LED_1 LED_3 1.50k 1.50k Figure 5-2. DP83826AEVM Main Schematic SNLU357 – APRIL 2025 DP83826AEVM User's Guide Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 10 EZFET_SBW_RST RST/SBWTDIO VUSB VSSU 0.22µF AVSS1 MCU_VCC AVCC1 AVSS2 DVCC1 DVSS1 DVCC2 DVSS2 MSP430F5528IRGCR 0.1µF 10uF 0.1µF Figure 5-3. DP83826AEVM USB and MSP430 Schematic DP83826AEVM User's Guide SNLU357 – APRIL 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 11 0.22uF AVSS1 1.00M AVCC1 AVSS2 DVCC1 DVSS1 DVCC2 DVSS2 MCU_VCC MSP430F5529IPN TEST/SBWTCK RST/SBWTDIO RST/SBWTDIO 10uF 0.1µF 0.1µF 0.1µF 1000pF Figure 5-4. DP83826AEVM MSP430 Schematic SNLU357 – APRIL 2025 DP83826AEVM User's Guide Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 12 TX_D0_EXT GND_EXT TX_CLK_EXT ERM8-030-01-L-D-EM2-TR CLK_OUT_EXT RESET_EXT GND_EXT GND_EXT PWDN_EXT HTSW-121-07-G-T GND_EXT - J22 extended to include VDDIO option Figure 5-5. DP83826AEVM Breakout Board Schematic DP83826AEVM User's Guide SNLU357 – APRIL 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 13: Pcb Layouts

    Hardware Design Files 5.2 PCB Layouts Figure 5-6. Layer 1, Top Figure 5-7. Layer 2, GND Figure 5-8. Layer 3, Signal SNLU357 – APRIL 2025 DP83826AEVM User's Guide Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 14 Hardware Design Files www.ti.com Figure 5-9. Layer 4, Power Figure 5-10. Layer 5, GND Figure 5-11. Layer 6, Bottom DP83826AEVM User's Guide SNLU357 – APRIL 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 15: Bill Of Materials (Bom)

    CAP, CERM, 22pF, 50V, +/- 5%, C0G/ C43, C44 CGA3E2C0G1H220J080AA NP0, AEC-Q200 Grade 1, 0603 CAP, CERM, 2000pF, 50V, +/- 5%, C46, C56 GRM1885C1H202JA01D Murata C0G/NP0, 0603 SNLU357 – APRIL 2025 DP83826AEVM User's Guide Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 16 J6, J7, J8, J9, J23 Header, 100mil, 2x1, Tin, TH PEC02SAAN J10, J11, J12, J13 Header, 1x1, Tin, TH PEC01SAAN Receptacle, 0.8mm, 30x2, Tin, Edge ERM8-030-01-L-D-EM2-TR mount DP83826AEVM User's Guide SNLU357 – APRIL 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 17 RES, 0, 5%, 0.1 W, AEC-Q200 Grade R41, R88 CRCW06030000Z0EA Vishay-Dale 0, 0603 R43, R44, R45, RES, 75.0, 1%, 0.125 W, AEC-Q200 CRCW080575R0FKEA Vishay Grade 0, 0805 SNLU357 – APRIL 2025 DP83826AEVM User's Guide Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 18 25MHz Mixed Signal Microcontroller with 128 KB Flash, 8192 B SRAM and MSP430F5529IPN 63 GPIOs, -40 to 85 degC, 80-pin QFP (PN), Green (RoHS & no Sb/Br) DP83826AEVM User's Guide SNLU357 – APRIL 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 19 Crystal, 25MHz, 20ppm, AEC-Q200 XTAL1 ECS-250-12-33Q-JES-TR Grade 1, SMD Y1, Y3 Crystal, 24MHz, 20pF, SMD ECS-240-20-33-DU-TR ECS Inc. Resonator, 6MHz, 15pF SMD CSTCR6M00G53Z-R0 Murata SNLU357 – APRIL 2025 DP83826AEVM User's Guide Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 20 Reduced Media Independent Interface Start-of-Frame Detection VDDA Analog Core Supply Rail VDDIO Digital Supply Rail Pulldown Pullup Microcontroller Physical Medium Dependent PRBS Pseudo Random Binary Sequence DP83826AEVM User's Guide SNLU357 – APRIL 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 21 Related Documentation 7 Related Documentation 7.1 Supplemental Content SNLU357 – APRIL 2025 DP83826AEVM User's Guide Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 22 References www.ti.com 8 References DP83826AEVM User's Guide SNLU357 – APRIL 2025 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated...
  • Page 23 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
  • Page 24 www.ti.com Regulatory Notices: 3.1 United States 3.1.1 Notice applicable to EVMs not FCC-Approved: FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and software developers to write software applications for use with the end product.
  • Page 25 www.ti.com Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à...
  • Page 26 www.ti.com EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS. 4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling or using the EVM, including without limitation any warning or restriction notices.
  • Page 27 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2023, Texas Instruments Incorporated...
  • Page 28: Important Notice

    TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2025, Texas Instruments Incorporated...

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