Summary of Contents for STMicroelectronics ATLASLBBD
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ATLASLBBD STPC Atlas Local Bus Mode Evaluation Kit User Manual For use with ATLASLBBD Board Rev A Issue 1.0 April 12, 2001 Information provided is believed to be accurate and reliable. However, ST Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringements of patents or other rights of third parties which may result from its use.
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STPC Atlas Local Bus Mode Evaluation Kit User Manual 2/52 ® Issue 1.0...
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BOARD ERRATA ® This Errata concerns the ATLASLBBD Please note; This board revision is not the final board release. It has some limita- tion: The board is stable and tested upto 90MHz/90MHz (HClk/MClk). At 100MHz/100MHz, some glitch can appear on the VGA.
Motherboard Functional Specification 1 Motherboard Functional Specification The Atlas Local Bus Board (ATLASLBBD) is a high-performance personal computer system based on the STPC Atlas microprocessor, running with an external 14.31818 MHz quartz crystal oscillator. 1.1 ATLASLBBD at a Glance Each physical area of the board, as illustrated in the board layout block diagram...
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Motherboard Functional Specification • Display for BIOS POST code (also helpful for software debug). Dimensions: 24.5 cm x 78.5 cm x four layer PCB. Mounting: Six mounting holes. Drawing to be issued later Figure 1-1. Board Layout Block Diagram 10/52 ®...
Motherboard Functional Specification 1.2 Unified Memory Architecture The STPC Atlas makes use of a tightly coupled Unified Memory Architecture (UMA), where the same memory array is used for CPU main memory and graphics frame-buffer. This means a reduction in total system memory for system performances that are equal to that of a comparable frame buffer and system memory based system, and generally much better, due to the higher memory bandwidth allowed by attaching the graphics engine directly to the 64-bit processor host interface running at the speed of the processor bus rather than the...
Motherboard Functional Specification - Two Serial Ports - One Parallel Port - 16 General Purpose I/Os - I²C Interface • Integrated Peripheral Controller - DMA Controller - Interrupt Controller - Timer/Counters • Power Management Unit • Watchdog • JTAG IEEE1149.1 1.5 Memory Interface The STPC Atlas handles the memory data bus directly, controlling from 8 MBytes to 128 MBytes.
Motherboard Functional Specification 1.7 PCI Bus Interface The PCI bus is the main data communication link to the STPC Atlas chip. The STPC Atlas translates appropriate host bus I/O and Memory cycles onto the PCI bus. It also supports the generation of Configuration cycles on the PCI bus.
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Motherboard Functional Specification allows the user to expand the image vertically and horizontally in text mode by inserting programmable blank pixels. It allows expansion of the image vertically and horizontally in graphics mode by replicating pixels. The replication of J times every K pixel is independently programmable in the vertical and horizontal directions.
Hardware Installation 2 Hardware Installation Installing the system board requires the configuration of switches, the setting of jumpers and the attachment of connectors. 2.1 Jumpers Jumpers on the system board provide information to your system about installed options and system settings. 2.1.1 Setting Jumpers Configure the system board option by setting jumpers.
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Hardware Installation For the S1 and S500 DIP switches, the following symbols are used: Push the button to the top side of the DIP switch (ON marking) to set the related entry to logical “0”. Pull the button to the bottom side of the DIP switch to set the related entry to logical “1”...
Hardware Installation 2.2 Default Jumper Settings. Table 2-1. Default Jumper Settings Jumper Purpose Setting J1901 CMOS RAM clean-up Jumper OFF - default: Normal mode J3302 Board power control - default: Switch and soft control TFT power value J3800 - default: 3.3 V Disk-on-Chip Address Range System configuration...
Hardware Installation 2.3 Installation For the main board installation, it is important that the jumper settings are set correctly. Improper jumper settings can cause system instability or system hang-up. Please follow the installation procedures given below. 2.3.1 Step 1: Installing Memory The main board supports up to four dual-footprint sockets for soldered SDRAM memory devices and has also a single DIMM SDRAM socket.
Hardware Installation 2.3.4 Step 4: Setting the PCI Clock Speed (S500 - 4 & 7) Using the S500 DIP switch, set keys 4 and 7 as given in Table 2-3 Table 2-4, according to the STPC Atlas HCLK (CPU) speed setup and the required PCI clock speed. This is validated on reset or Power up.
JTAG Facility 3 JTAG Facility 3.1 Introduction The JTAG (Joint Test Action Group) facility complies with the requirements of IEEE1149.1, a common protocol and boundary-scan architecture developed into an industrial standard. It requires the use of special test circuits at the inputs and outputs (boundary-scan) of selected semi-conductor components, together with logic to control these test circuits.
(http://www.st.com/stpc/software). Note also that as the ATLASLBBD does not include a floppy disk drive port, the loading of software will require the use of external equipment, such as a CD-ROM reader, hard disk drive, etc., or the use of a network or serial port connection.
Motherboard Resources 5 Motherboard Resources 5.1 System Address Map This section describes the mapping of the CPU memory and IO address spaces. Also covered in this section are the PCI configuration space mapping 5.2 Memory Address Map. Table 5-1. Memory Address Map Address Range (Dec) Address Range (Hex) Size...
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Motherboard Resources Table 5-2. IO Address Map Address Range (Hex) Size (Hex) Description 0102h 1 Byte VGA Setup Register 0170h-0177h 8 Bytes Secondary IDE Channel 01F0h-01F7h 8 Bytes Primary IDE Channel 0278h-027Bh 4 Bytes Parallel Port 2 02F8h-02FFh 8 Bytes Serial Port 2 0378h-037Fh 8 Bytes...
Motherboard Resources 5.4 Interrupts and DMA Channels Table 5-3. IRQ Channels System Resource Parity Error Reserved, Interval Timer Reserved, Keyboard Buffer Full Reserved, Cascade Interrupt from Interrupt Controller 2 Serial Port 2 Serial Port 1 Parallel Port 2 User available Parallel Port 1 Real Time Clock User available (Video)
Motherboard Hardware Specification 6 Motherboard Hardware Specification 6.1 Connectors The following table (Table 6-1) contains a full list of the connectors implemented on the board. Refer to the numbered Table given for pin connection details. Table 6-1. Connectors List Identification Table No.
Motherboard Hardware Specification 6.2.5 CVBS Video Connectors Table 6-6. CVBS Video Connector (P3100) Signal Name COMPOSITE VIDEO Table 6-7. CVBS Video Connector (J3100) Signal Name COMPOSITE VIDEO 36/52 ® Issue 1.0...
Motherboard Hardware Specification 6.2.6 S-VHS Video Connector Table 6-8. S-VHS Video Connector (P3109) Signal Name Y_IN C_IN 6.2.7 Digital Video Input Connector Table 6-9. Digital Video Input Port (P3102) Signal Name VIP_D0 VIP_D1 VIP_D2 Not Connected VIP_D3 Not Connected VIP_D4 Not Connected VIP_D5 VIP_SCL...
Motherboard Hardware Specification 6.2.8 PCI Connectors Table 6-10. PCI Connectors (P900 - P901) Signal Name Signal Name -12V +12V see next 3 tables see next 3 tables see next 3 tables see next 3 tables Reserved Reserved Reserved Reserved Reserved RESET# PCICLK see next 3 tables...
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Motherboard Hardware Specification Table 6-10. PCI Connectors (P900 - P901) Signal Name Signal Name TRDY# 3.3V DEVSEL# STOP# 3.3V PCILOCK# SDONE PERR# SBO# 3.3V SERR# 3.3V AD15 CBE1# 3.3V AD14 AD13 AD11 AD12 AD10 CBE0# 3.3V 3.3V Table 6-11. PCI Connector (P901) Signal Name Signal Name PCI_INT1#...
Motherboard Hardware Specification Table 6-12. PCI Connector (P900) Signal Name Signal Name PCI_INT0# PCI_INT2# PCI_INT1# PCI_INT3# PCI_GNT0# PCI_REQ0# IDSELA (AD30) 6.2.9 USB Port Connectors Table 6-13. Dual USB Connector (P2300) Signal Name Data0- Data0+ Data1- Data1+ VCC Fuse 40/52 ® Issue 1.0...
Motherboard Hardware Specification 6.2.12 ATX Power Supply Connector Table 6-16. ATX Power Supply Connector (P3300) Signal Name Signal Name +3.3V +3.3V -12V +3.3V ON# / OFF POWER GOOD +5V Supply Backup +12V 6.2.13 TFT Screen Output Table 6-17. TFT Screen Output Connector (P3800) Signal Name DCLK FPLINE...
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Motherboard Hardware Specification Table 6-17. TFT Screen Output Connector (P3800) Signal Name TFTVCC TFTVCC 44/52 ® Issue 1.0...
Motherboard Hardware Specification Table 6-20. GPIO Connector (P3700) Signal Name GPIO_11 GPIO_12 6.2.17 I2C Connector Table 6-21. I2C Connector (P4400) Signal Name 6.2.18 Local Bus Connector Table 6-22. Local Bus Connector (P1700) Signal Name Signal Name Signal Name SYSRESET# LB2_IOCS#7 GPIO_0 GPIO_1 IOCS#0...
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Motherboard Hardware Specification Table 6-22. Local Bus Connector (P1700) Signal Name Signal Name Signal Name IOCS#2 IOCS#3 IOCS#4 IOCS#5 IOCS#6 IRQ11 BE#0 BE#1 IRQ10 READY# 14.318 MHz FCS0L# IRQ5 3.3 V FCS0H# ISA_CLK2X FCS1L# IRQ6 3.3 V FCS1H# ISA_CLK 48/52 ®...
Motherboard Hardware Specification 6.3 Electrical Specifications The Power Supply used to power this board must have the following characteristics. Table 6-23. Power Supply Characteristics Voltage Precision +5 V +/- 250 mV +12 V +/- 600 mV -5 V +/-500 mV -12 V +/- 1.2 V +3.3 V...
A dedicated STPC section is available, providing up to date hardware documentation and software tools. Any updated versions of this ATLASLBBD User Manual will be found in this section. Technical questions regarding the ATLASLBBD Evaluation Kit or any other STPC related product should be addressed to your nearest ST Microelectronics Sales Office.
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No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice.
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