4-1. INTRODUCTION
This chapter presents the principles of operation of
the iSBX 350 Parallel Multimodule Board. Included
are sections covering the interfaces between the host
microcomputer and the Multimodule board and
between the parallel 1/0 lines and the Multimodule
board. The interfaces to the Multimodule board and
the interrupt system are detailed in the following
text.
4-2. iSBX™ BUS INTERFACE
The interface to the host iSBC microcomputer con-
sists of several signals which control the Multi-
module board functions. Each signal is described in
the following paragraphs and shown in the sche-
matic diagram, included as figure 5-2.
RESET (Reset). This active high signal to the PPI
provides initialization for the chip, resets the control
register, and conditions all 8255A-5 ports to the
input mode, RESET is derived from the microproces-
sor reset signal in the host iSBC microcomputer.
IOWRT I (Write). This active low input to the Multi-
module board indicates that data or a command is to
be written into the
PPI
from the iSBX bus
(rvtDO-
MD7). Reference table 4-1.
lORD
I
(Read). This active low input indicates that
data is to be read from the PPI and made available
on the iSBX bus (MDO-MD7). Reference table 4-1.
MCSOI (Chip Select). This active low input selects
the PPI, enabling communication between the PPI
and the host iSBC microcomputer. Reference table
4-1.
MAO, MAl (Address lines). The active high inputs
to the Multimodule board, in conjunction with the
IORDI and IOWRTI lines, control selection of one of
three ports or the Control Word Register in the PPI.
Reference table 4-1.
MDO-MD7 (Bidirectional Data Bus). These active
high lines provide the interface for data and
command transfer between the PPI and the host
iSBC microcomputer.
MPST
I
(Module present). This active low output
signal indicates to the host iSBC microcomputer
that a Multimodule board has been installed.
OPTO, OPTI (Option signals). These user-defined
signals are included to provide application flexibility
for the Multimodule board. These signals, if required
by the application, must be user-configured via
jumpers.
MINTRO, MINTRI (Interrupt signals). These sig-
nals are included to provide interrupt generation on
the Multimodule board. These signals, if required by
the application, must be user-configured via jumpers.
Table 4-1. PPIOperations
MA1
MAO
IORDI
IOWRTI
MCSOI
INPUT OPERATION (READ)
0
0
0
1
0
Port A - Data Bus
0
1
0
1
0
Port B - Data Bus
1
0
0
1
0
Port C - Data Bus
1
1
0
1
0
Illegal Condition
OUTPUT OPERATION (WRITE)
0
0
1
0
0
Data Bus - Port A
0
1
1
0
0
Data Bus - Port B
1
0
1
0
0
Data Bus - Port C
1
1
1
0
0
Data Bus - Control
DISABLE FUNCTION
X
X
X
X
1
Data Bus - 3-State
X
X
1
1
X
Data Bus - 3-State
4-1
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