Supermicro SuperBlade SBI-6429P-C3N User Manual page 78

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SBI-6429P-C3N SuperBlade Module User's Manual

Table 5-9. PCIe/PCI/PnP Configuration Sub-menu

Menu Option

PCI Bus Driver Version

PCI Devices Common Settings

Above 4G Decoding

SR-IOV Support

MMIO High Base

MMIO High Granularity

Size

PCI PERR/SERR Support

Maximum Read Request

MMCFG Base

VGA Priority

PCI Devices Option ROM Settings

Onboard NVME 1 OPROM

Onboard NVME 2 OPROM

CPU1 Slot 1 PCI-E x8

OPROM

CPU1 Slot2 PCI-E x16

OPROM

CPU1 Slot 3 PCI-E x8

OPROM

Onboard Video OPROM

Onboard LAN 1 OPROM

Onboard LAN 2 OPROM

Description

The installed version for the PCI Bus Driver is static displayed here for your

information.

Select Enabled to decode a 64-bit PCI device in the space above 4G

Address. The options are Enabled and Disabled.

If the system has SR-10V capable PCIe device, this option Enables or

Disables single root I/O virtualization support.

Use this setting to select the MMIO High Base. Options include 56T, 48T,

24T, 16T, 4T and 1T.

This setting selects the allocation size used to assign MMIOH resources.

The total MMIOH space can be up to 32xgranularity. Per stack MMIOH

resource assignments are multiples of the granularity where 1 unit per

stack is the default allocation. Options are numbers 1G~1024G where

256G is the default.

This setting Enables or Disables the runtime event for SERR/PERR

errors.

Select Auto to allow the system BIOS to automatically set the maximum

Read Request size for a PCI-E device to enhance system performance.

The options are Auto, 128 Bytes, 256 Bytes, 512 Bytes, 1024 Bytes, 2048

Bytes, and 4096 Bytes.

This setting selects the MMCFG base. Options include 1G, 1.5G, 1.75G,

2G, 2.25G and 3G.

This setting decides the priority between Onboard and the first Offboard

video device found.

This setting enables/disables the Onboard NVMe OPROM option. Options