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Table 5-5. Chipset Configuration Sub-menu
Menu Option
North Bridge
Configuration
UPI Configuration
UPI General
Configuration
Information
Degrade
Precedence
Link L0p Enable
Link L1 Enable
IO Directory Cache
(IODC)
Isoc Mode
Memory Configuration This sub-menu displays Memory Configuration settings.
Enforce POR
Memory Frequency
Data Scrambling for
NVMDIMM
Data Scrambling for
DDR4
tCCD_L Relaxation
Enable ADR
Memory Topology
Memory RAS
Configuration
Description
This sub-menu configures North Bridge features and shows configuration
information.
This static information shows UPI General Configuration information for
your system.
Use this setting to select the Degrade Precedence. Choose Topology
Precedence to degrade features if the system options are in conflict.
Choose Feature Precedence to degrade topology if the system options are
in conflict.
Use this setting to enable/disable Link L0p. Options include Disable,
Enable or Auto.
Use this setting to enable/disable Link L1. Options include Disable, Enable
or Auto.
The IO Directory Cache (IODC) generates snoops instead of memory
lookups, for remote InvItoM (ITO) and/or WCiLF (cores). Options include
the following:
• Disable
• Auto (sets to WCiLF)
• Enable for Remote InvItoM Hybrid Push InvItoM AllocFlow
• Enable for Remote InvItoM Hybrid AllocNonAlloc
• Enable for Remote InvItoM and Remote WViLF
This sets Isoc Mode to either Enable, Disable or Auto.
This setting allows you to enforce POR restrictions for DDR4 frequency
and voltage programming. Options include POR or Disabled.
This setting sets the maximum memory frequency in Mhz. Options are
Auto and frequency values from 1866 ~ 2666 Mhz.
Use this setting to enable data scrambling for NVMDIMM. Options include
Auto (sets it to the MRC default), Disabled and Enabled.
Use this setting to enable data scrambling for DDR4. Options include Auto
(sets it to the MRC default), Disabled and Enabled.
Use this setting to specify if the tCCD_L is overridden by the SPD or based
on the memory frequency. Options include Auto, Disable and Enable.
This setting enables the detecting and enabling of ADR. Options include
Enable or Disable.
This submenu, when selected, provides with you with static information for
memory topology.
This submenu displays and provides options to change the Memory RAS
settings.
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Chapter 5: BIOS
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