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TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost
This user's guide contains information for the TPS55330EVM-017 evaluation module (EVM) as well as the
TPS55330 DC/DC converter. The document includes the performance specifications, schematic, and the
bill of materials for the TPS55330EVM-017.
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Performance Specification Summary
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SLVU930 - July 2013
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TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation
Copyright © 2013, Texas Instruments Incorporated
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User's Guide
SLVU930 - July 2013
Evaluation Module
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Summary of Contents for Texas Instruments TPS55330EVM-017
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Page 1: Table Of Contents
TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation Module This user’s guide contains information for the TPS55330EVM-017 evaluation module (EVM) as well as the TPS55330 DC/DC converter. The document includes the performance specifications, schematic, and the bill of materials for the TPS55330EVM-017. -
Page 2: Background
(77 ns typical), and the maximum duty cycle is less than 89% minimum and 93% typical. TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation SLVU930 – July 2013... -
Page 3: Test Setup And Results
Test point between voltage divider network and output. Used for loop-response measurements. COMP test point Output voltage test point at V connector GND test point at V connector SLVU930 – July 2013 TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation Module Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... -
Page 4: Tps55330Evm-017 Efficiency
Output Current - A C002 Figure 2. TPS55330EVM-017 Output Voltage Load Regulation Measurements are for an ambient temperature of 25°C. TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation SLVU930 – July 2013 Module Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... -
Page 5: Tps55330Evm-017 Output Voltage Line Regulation
(100 mV/div) C4: I (1.0 A/div) Time: 200 µs/div Figure 4. TPS55330EVM-017 V = 3.6-V Transient Response SLVU930 – July 2013 TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation Module Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... -
Page 6: Tps55330Evm-017 Loop Response
(20.0 mV/div) C1: SW (5.0 V/div) Time: 1.0 µs/div Figure 6. TPS55330EVM-017 V = 3.6-V Output Ripple TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation SLVU930 – July 2013 Module Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... -
Page 7: Tps55330Evm-017 Dcm Output Ripple
C1: SW (2.0 V/div) C3: V ac coupled (10.0 mV/div) Time: 200 µs/div Figure 8. TPS55330EVM-017 V = 3.6-V Pulse-Skipping SLVU930 – July 2013 TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation Module Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... -
Page 8: Tps55330Evm-017
(20.0 mV/div) C1: SW (5.0 V/div) Time: 1.0 µs/div Figure 10. TPS55330EVM-017 V = 3.6-V Input Voltage Ripple TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation SLVU930 – July 2013 Module Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... -
Page 9: Tps55330Evm-017 Power Up With En
(2.0 V/div) = 2.1 A = 3.6 V Time: 200 µs/div Figure 12. TPS55330EVM-017 Power Down With EN SLVU930 – July 2013 TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation Module Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... -
Page 10: Tps55330Evm-017 Power Up With
C3: V (2.0 V/div) = 2.1 A Time: 1.0 ms/div Figure 14. TPS55330EVM-017 Power Down With V TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation SLVU930 – July 2013 Module Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... -
Page 11: Board Layout
IC. Figure 15. TPS55330EVM-017 Top-Side Assembly SLVU930 – July 2013 TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation Module Submit Documentation Feedback... -
Page 12: Tps55330Evm-017 Top-Side Layout
Board Layout www.ti.com Figure 16. TPS55330EVM-017 Top-Side Layout Figure 17. TPS55330EVM-017 Internal Layer-1 Layout TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation SLVU930 – July 2013 Module Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... -
Page 13: Tps55330Evm-017 Internal Layer-2 Layout
Board Layout www.ti.com Figure 18. TPS55330EVM-017 Internal Layer-2 Layout Figure 19. TPS55330EVM-017 Bottom-Side Layout SLVU930 – July 2013 TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation Module Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... -
Page 14: Schematic And Bill Of Materials
FREQ 0.047uF 30.9k SYNC SYNC SYNC COMP 10.0k 1.87k 270pF 0.1uF Not Populated Figure 20. TPS55330EVM-017 Schematic TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation SLVU930 – July 2013 Module Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... -
Page 15: Tps55330Evm-017 Bill Of Materials
4. Ref designators marked with an asterisk ('**') cannot be substituted. All other components can be substituted with equivalent MFG's components. Reference 1. TPS55330, Integrated 5-A 24-V Boost/SEPIC/Flyback DC-DC Regulator data sheet (SLVSBX8) SLVU930 – July 2013 TPS55330EVM-017 2.9-V to 4.2-V Input, 5.0-V Output Boost Evaluation Module Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... - Page 16 Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization.
- Page 17 FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
- Page 18 Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan. Texas Instruments Japan Limited (address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan http://www.tij.co.jp...
- Page 19 FDA Class III or similar classification, then you must specifically notify TI of such intent and enter into a separate Assurance and Indemnity Agreement. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2013, Texas Instruments Incorporated...
- Page 20 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
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