GOWIN GW1NR Series User Manual
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GOWIN GW1NR Series User Manual

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GW1NR series of FPGA products
Package & Pinout User Guide
UG119-1.7.1E, 12/14/2023

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Summary of Contents for GOWIN GW1NR Series

  • Page 1 GW1NR series of FPGA products Package & Pinout User Guide UG119-1.7.1E, 12/14/2023...
  • Page 2 Copyright © 2023 Guangdong Gowin Semiconductor Corporation. All Rights Reserved. , LittleBee, and GOWIN are trademarks of Guangdong Gowin Semiconductor Corporation and are registered in China, the U.S. Patent and Trademark Office, and other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders.
  • Page 3 Revision History Date Version Description 04/03/2018 1.04E Initial version Published. 06/25/2018 1.05E MG81 package info. Added. 09/13/2018 1.06E The pins distribution view and package outline of MG81added. LVDS pairs added in Table 2-1;  12/12/2018 1.07E Packages of the devices embedded with PSRAM added. ...

  • Page 4: Table Of Contents

    Contents Contents Contents ......................... i List of Figures ....................iii List of Tables ...................... iii 1 About This Guide ..................1 1.1 Purpose ..........................1 1.2 Related Documents ......................1 1.3 Abbreviations and Terminology ................... 1 1.4 Support and Feedback ....................... 2 2 Overview ......................
  • Page 5 Contents 3.3 View of GW1NR-4 Pins Distribution ................. 17 3.3.1 View of MG81P Pins Distribution (PSRAM Embedded) ..........17 3.3.2 View of QN88P Pins Distribution (PSRAM Embedded) ..........18 3.3.3 View of QN88 Pins Distribution (SDRAM Embedded) ..........19 3.4 View of GW1NR-9 Pins Distribution ................. 20 3.4.1 View of QN88 Pins Distribution ..................

  • Page 6: List Of Figures

    List of Figures List of Figures Figure 3-1 View of GW1NR-1 FN32G Pins Distribution (Top View) ..........9 Figure 3-2 View of GW1NR-1 EQ144G Pins Distribution (Top View) ..........10 Figure 3-3 View of GW1NR-1 LQ100G Pins Distribution (Top View) ..........11 Figure 3-4 View of GW1NR-1 QN32X Pins Distribution (Top View) ..........
  • Page 7 List of Figures Figure 4-14 Recommended PCB Layout MG49P/MG49PG/MG49G ..........41 Figure 4-15 Package Outline MG81P ....................42 Figure 4-16 Recommended PCB Layout MG81P ................43 Figure 4-17 Package Outline MG100P/MG100PF/MG100PA/ MG100PT ........44 Figure 4-18 Recommended PCB Layout MG100P/MG100PF/MG100PA/MG100PT/MG100PS ..45 Figure 4-19 Package Outline FN32G ....................
  • Page 8 Table 1-1 Abbreviations and Terminologies ..................1 Table 2-1 Package and Max. User I/O Information, LVDS Pairs ............3 Table 2-2 Other Pins in the GW1NR Series ..................4 Table 2-3 Quantity of GW1NR-1 Pins ....................4 Table 2-4 Quantity of GW1NR-2 Pins ....................5 Table 2-5 Quantity of GW1NR-4 Pins (SDRAM embedded) .............

  • Page 9: About This Guide

    1 About This Guide 1.1 Purpose About This Guide 1.1 Purpose This manual contains an introduction to the GW1NR series of FPGA products together with a definition of the pins, list of pin numbers, distribution of pins, and package diagrams. 1.2 Related Documents The latest user guidelines are available on the GOWIN website at www.gowinsemi.com:...

  • Page 10: Support And Feedback

    Full Name MBGA LQFP ELQFP 1.4 Support and Feedback Gowin Semiconductor provides customers with comprehensive technical support. If you have any questions, comments, or suggestions, please feel free to contact us directly using the information provided below. Website: www.gowinsemi.com E-mail: support@gowinsemi.com UG119-1.7.1E...

  • Page 11: Overview

    I/O compatibility and flexible usage. 2.1 PB-Free Package The GW1NR series of FPGA products are PB free in line with the EU ROHS environmental directives. The substances used in the GW1NR series of FPGA products are in full compliance with the IPC-1752 standards.

  • Page 12: Power Pin

    I/O. When mode [2:0] = 001, JTAGSEL_N and the four JTAG pins (TCK, TDI, TDO, and TMS) can be used as GPIO simultaneously, and the Max. user I/O plus one. 2.3 Power Pin Table 2-2 Other Pins in the GW1NR Series VCCIO0 VCCIO1 VCCIO2...

  • Page 13: Quantity Of Gw1Nr-2 Pins

    2 Overview 2.4 Pin Quantity GW1NR-1 Pin Type FN32G EQ144G LQ100G QN32X QN48X JTAGSEL_N Note! Quantity of single end/ differential/LVDS I/O include CLK pins, and download  pins. The JTAGSEL_N and JTAG pins cannot be used as I/O simultaneously. The ...

  • Page 14: Quantity Of Gw1Nr-4 Pins

    2 Overview 2.4 Pin Quantity and TMS) are used as I/O. Pin multiplexing.  2.4.3 Quantity of GW1NR-4 Pins Table 2-5 Quantity of GW1NR-4 Pins (SDRAM embedded) GW1NR-4 Pin Type QN88 BANK0 20/5/0 I/O Single BANK1 15/6/2 end/Differential BANK2 23/9/7 pair/LVDS BANK3 12/4/2...

  • Page 15: Quantity Of Gw1Nr-9 Pins

    2 Overview 2.4 Pin Quantity GW1NR-4 Pin Type MG81P QN88P VCCIO2 VCCIO3 VCCX/VCCIO0 MODE0 MODE1 MODE2 JTAGSEL_N Note! Quantity of single end/ differential/LVDS I/O include CLK pins, and download  pins. The JTAGSEL_N and JTAG pins cannot be used as I/O simultaneously. The ...

  • Page 16: Introduction To The I/O Bank

    GW1NR-2 MG49P/MG49PG/MG49G includes seven I/O Banks. This manual provides an overview of the distribution view of the pins in the GW1NR series of FPGA products. Please refer to 3 View of Pin Distribution for further details. Different IO Banks in the GW1NR series FPGA products are marked with different colors.

  • Page 17: View Of Pin Distribution

    3 View of Pin Distribution 3.1 View of GW1NR-1 Pins Distribution View of Pin Distribution 3.1 View of GW1NR-1 Pins Distribution 3.1.1 View of FN32G Pins Distribution Figure 3-1 View of GW1NR-1 FN32G Pins Distribution (Top View) Table 3-1 Other pins in GW1NR-1 FN32G VCCIO0/VCCIO1 VCCIO2 VCCIO3...

  • Page 18: View Of Eq144G Pins Distribution

    3 View of Pin Distribution 3.1 View of GW1NR-1 Pins Distribution 3.1.2 View of EQ144G Pins Distribution Figure 3-2 View of GW1NR-1 EQ144G Pins Distribution (Top View) Table 3-2 Other pins in GW1NR-1 EQ144G 1,36,73,108 VCCIO0 109,127 VCCIO1 77,91,103 VCCIO2 37,55 VCCIO3 5,19,31...

  • Page 19: View Of Lq100G Pins Distribution

    3 View of Pin Distribution 3.1 View of GW1NR-1 Pins Distribution 3.1.3 View of LQ100G Pins Distribution Figure 3-3 View of GW1NR-1 LQ100G Pins Distribution (Top View) Table 3-3 Other pins in GW1NR-1 LQ100G 1,25,51,75 VCCIO0 76,88 VCCIO1 54,63,71 VCCIO2 26,38 VCCIO3 4,13,21...

  • Page 20: View Of Qn32X Pins Distribution

    3 View of Pin Distribution 3.1 View of GW1NR-1 Pins Distribution 3.1.4 View of QN32X Pins Distribution Figure 3-4 View of GW1NR-1 QN32X Pins Distribution (Top View) Table 3-4 Other pins in GW1NR-1 QN32X 2,18 VCCIO0 VCCIO1 7,15 VCCIO2 VCCIO3 24,31 3,22 UG119-1.7.1E...

  • Page 21: View Of Qn48X Pins Distribution

    3 View of Pin Distribution 3.1 View of GW1NR-1 Pins Distribution 3.1.5 View of QN48X Pins Distribution Figure 3-5 View of GW1NR-1 QN48X Pins Distribution (Top View) Table 3-5 Other pins in GW1NR-1 QN48X 1,25 VCCIO0 VCCIO1 13,22 VCCIO2 VCCIO3 39,46 UG119-1.7.1E 13(47)

  • Page 22: View Of Gw1Nr-2 Pins Distribution

    3 View of Pin Distribution 3.2 View of GW1NR-2 Pins Distribution 3.2 View of GW1NR-2 Pins Distribution 3.2.1 View of MG49P Pins Distribution (PSRAM Embedded) Figure 3-6 View of GW1NR-2 MG49P Pins Distribution (Top View, PSRAM Embedded) Table 3-6 Other pins in GW1NR-2 MG49P (PSRAM Embedded) VCCD VCCIOD VCCIO0...

  • Page 23: View Of Mg49Pg Pins Distribution (Psram And Flash Embedded)

    3 View of Pin Distribution 3.2 View of GW1NR-2 Pins Distribution 3.2.2 View of MG49PG Pins Distribution (PSRAM and Flash Embedded) Figure 3-7 View of GW1NR-2 MG49PG Pins Distribution (Top View, PSRAM and Flash Embedded) Table 3-7 Other pins in GW1NR-2 MG49PG (PSRAM and Flash Embedded) VCCD VCCIOD VCCIO0...

  • Page 24: View Of Mg49G Pins Distribution (Flash Embedded)

    3 View of Pin Distribution 3.2 View of GW1NR-2 Pins Distribution 3.2.3 View of MG49G Pins Distribution (Flash Embedded) Figure 3-8 View of GW1NR-2 MG49G Pins Distribution (Top View, Flash Embedded) Table 3-8 Other pins in GW1NR-2 MG49G (Flash Embedded) VCCD VCCIOD VCCIO0...

  • Page 25: View Of Gw1Nr-4 Pins Distribution

    3 View of Pin Distribution 3.3 View of GW1NR-4 Pins Distribution 3.3 View of GW1NR-4 Pins Distribution 3.3.1 View of MG81P Pins Distribution (PSRAM Embedded) Figure 3-9 View of GW1NR-4 MG81P Pins Distribution (Top View, PSRAM Embedded) Table 3-9 Other pins in GW1NR-4 MG81P (PSRAM Embedded) A2, A8, J2 VCCX VCCIO0...

  • Page 26: View Of Qn88P Pins Distribution (Psram Embedded)

    3 View of Pin Distribution 3.3 View of GW1NR-4 Pins Distribution 3.3.2 View of QN88P Pins Distribution (PSRAM Embedded) Figure 3-10 View of GW1NR-4 QN88P Pins Distribution (Top View, PSRAM Embedded) Table 3-10 Other pins in GW1NR-4 QN88P (PSRAM Embedded) 1, 22, 45, 66 VCCX/VCCIO0 64, 67, 78...

  • Page 27: View Of Qn88 Pins Distribution (Sdram Embedded)

    3 View of Pin Distribution 3.3 View of GW1NR-4 Pins Distribution 3.3.3 View of QN88 Pins Distribution (SDRAM Embedded) Figure 3-11 View of GW1NR-4 QN88 Pins Distribution (Top View, SDRAM Embedded) Table 3-11 Other pins in GW1NR-4 QN88 (SDRAM Embedded) 1, 22, 45, 66 VCCX/VCCIO0 64, 67, 78...

  • Page 28: View Of Gw1Nr-9 Pins Distribution

    3 View of Pin Distribution 3.4 View of GW1NR-9 Pins Distribution 3.4 View of GW1NR-9 Pins Distribution 3.4.1 View of QN88 Pins Distribution Figure 3-12 View of GW1NR-9 QN88 Pins Distribution (Top View) Table 3-12 Other pins in GW1NR-9 QN88 1, 22, 45, 66 VCCX/VCCIO0 64, 67, 78...

  • Page 29: View Of Qn88P Pins Distribution

    3 View of Pin Distribution 3.4 View of GW1NR-9 Pins Distribution 3.4.2 View of QN88P Pins Distribution Figure 3-13 View of GW1NR-9 QN88P Pins Distribution (Top View) Table 3-13 Other pins in GW1NR-9 QN88P 1, 22, 45, 66 VCCX/VCCIO0 64, 67, 78 VCCIO1 VCCIO2 23, 44...

  • Page 30: View Of Mg100P Pins Distribution

    3 View of Pin Distribution 3.4 View of GW1NR-9 Pins Distribution 3.4.3 View of MG100P Pins Distribution Figure 3-14 View of GW1NR-9 MG100P Pins Distribution (Top View) Table 3-14 Other pins in GW1NR-9 MG100P A2,J2,A8 VCCIO0 VCCIO1 VCCIO2 VCCIO3 VCCX MODE A1,A9,J1,J9 UG119-1.7.1E...

  • Page 31: View Of Mg100Pf Pins Distribution

    3 View of Pin Distribution 3.4 View of GW1NR-9 Pins Distribution 3.4.4 View of MG100PF Pins Distribution Figure 3-15 View of GW1NR-9 MG100PF Pins Distribution (Top View) Table 3-15 Other pins in GW1NR-9 MG100PF A2,J2,A8 VCCIO0 VCCIO1 VCCIO2 VCCIO3 VCCX MODE A1,A9,J1,J9 UG119-1.7.1E...

  • Page 32: View Of Lq144P Pins Distribution

    3 View of Pin Distribution 3.4 View of GW1NR-9 Pins Distribution 3.4.5 View of LQ144P Pins Distribution Figure 3-16 View of GW1NR-9 LQ144P Pins Distribution (Top View) Table 3-16 Other pins in GW1NR-9 LQ144P 1, 36, 73, 108 VCCIO0 109, 127 VCCIO1 91, 103 VCCIO2...

  • Page 33: View Of Mg100Pa Pins Distribution

    3 View of Pin Distribution 3.4 View of GW1NR-9 Pins Distribution 3.4.6 View of MG100PA Pins Distribution Figure 3-17 View of GW1NR-9 MG100PA Pins Distribution (Top View) Table 3-17 Other pins in GW1NR-9 MG100PA A2,J2,A8 VCCIO0 VCCIO1 VCCIO2 VCCIO3 VCCX MODE A1,A9,J1,J9 UG119-1.7.1E...

  • Page 34: View Of Mg100Ps Pins Distribution

    3 View of Pin Distribution 3.4 View of GW1NR-9 Pins Distribution 3.4.7 View of MG100PS Pins Distribution Figure 3-18 View of GW1NR-9 MG100PS Pins Distribution (Top View) Table 3-18 Other pins in GW1NR-9 MG100PS A2,A8,J2 VCCIO0 VCCIO1 VCCIO2 VCCIO3 VCCX MODE A1,A9,J1,J9 UG119-1.7.1E...

  • Page 35: View Of Mg100Pt Pins Distribution

    3 View of Pin Distribution 3.4 View of GW1NR-9 Pins Distribution 3.4.8 View of MG100PT Pins Distribution Figure 3-19 View of GW1NR-9 MG100PT Pins Distribution (Top View) Table 3-19 Other pins in GW1NR-9 MG100PT A2,A8,J2 VCCIO0 VCCIO1 VCCIO2 VCCIO3 VCCX MODE A1,A9,J1,J9 UG119-1.7.1E...

  • Page 36: Package Diagrams

    4 Package Diagrams Package Diagrams 4.1 QN88/QN88P Package Outline (10mm x 10mm) Figure 4-1 Package Outline QN88/QN88P 注！ For GW1NR-LV4QN88, GW1NR-UV4QN88, and GW1NR-LV9QN88, the value of  A(NOM) is 0.85mm. For GW1NR-LV4QN88P, GW1NR-UV4QN88P, GW1NR-LV9QN88P, and  GW1NR-UV9QN88P, the value of A(NOM) is 0.75mm. UG119-1.7.1E 28(47)

  • Page 37: Figure 4-2 Recommended Pcb Layout Qn88/Qn88P

    4 Package Diagrams 4.1 QN88/QN88P Package Outline (10mm x 10mm) Figure 4-2 Recommended PCB Layout QN88/QN88P GW1NR_QN88_10R00_10R00_0R40 TOP VIEW Unit:mm UG119-1.7.1E 29(47)

  • Page 38: Qn32X Package Outline (5Mm X 5Mm)

    4 Package Diagrams 4.2 QN32X Package Outline (5mm x 5mm) 4.2 QN32X Package Outline (5mm x 5mm) Figure 4-3 Package Outline QN32X EXPOSED THERMAL PAD ZONE BOTTOM VIEW MILLIMETER SYMBOL 0.70 0.75 0.80 0.05 0.02 0.18 0.25 0.30 0.18 0.25 0.20 4.90 5.00...

  • Page 39: Figure 4-4 Recommended Pcb Layout Qn32X

    4 Package Diagrams 4.2 QN32X Package Outline (5mm x 5mm) Figure 4-4 Recommended PCB Layout QN32X GW1N_QN32X_5R00_5R00_0R50 TOP VIEW Unit:mm UG119-1.7.1E 31(47)

  • Page 40: Qn48X Package Outline (7Mm X 7Mm)

    4 Package Diagrams 4.3 QN48X Package Outline (7mm x 7mm) 4.3 QN48X Package Outline (7mm x 7mm) Figure 4-5 Package Outline QN48X PIN 1(Laser Mark) EXPOSED THERMAL DETAIL A PAD ZONE TOP VIEW BOTTOM VIEW DETAIL A MILLIMETER SYMBOL 0.70 0.80 0.75 0.05...

  • Page 41: Figure 4-6 Recommended Pcb Layout Qn48X

    4 Package Diagrams 4.3 QN48X Package Outline (7mm x 7mm) Figure 4-6 Recommended PCB Layout QN48X GW1NR_QN48X_7R00_7R00_0R50 TOP VIEW Unit:mm UG119-1.7.1E 33(47)

  • Page 42: Lq100G Package Outline (14Mm X 14Mm)

    4 Package Diagrams 4.4 LQ100G Package Outline (14mm x 14mm) 4.4 LQ100G Package Outline (14mm x 14mm) Figure 4-7 Package Outline LQ100G UG119-1.7.1E 34(47)

  • Page 43: Figure 4-8 Recommended Pcb Layout Lq100G

    4 Package Diagrams 4.4 LQ100G Package Outline (14mm x 14mm) Figure 4-8 Recommended PCB Layout LQ100G GW1NR_LQ100G_16R00_16R00_0R50 TOP VIEW UG119-1.7.1E 35(47)

  • Page 44: Lq144/Lq144P Package Outline (20Mm X 20Mm)

    4 Package Diagrams 4.5 LQ144/LQ144P Package Outline (20mm x 20mm) 4.5 LQ144/LQ144P Package Outline (20mm x 20mm) Figure 4-9 Package Outline LQ144/LQ144P UG119-1.7.1E 36(47)

  • Page 45: Figure 4-10 Recommended Pcb Layout Lq144/Lq144P

    4 Package Diagrams Figure 4-10 Recommended PCB Layout LQ144/LQ144P GW1NR_LQ144_22R00_22R00_0R50 TOP VIEW UG119-1.7.1E 37(47)

  • Page 46: Eq144G Package Outline (20Mm X 20Mm)

    4 Package Diagrams 4.6 EQ144G Package Outline (20mm x 20mm) 4.6 EQ144G Package Outline (20mm x 20mm) Figure 4-11 Package Outline EQ144G 5.00REF 5.00REF UG119-1.7.1E 38(47)

  • Page 47: Figure 4-12 Recommended Pcb Layout Eq144G

    4 Package Diagrams 4.6 EQ144G Package Outline (20mm x 20mm) Figure 4-12 Recommended PCB Layout EQ144G GW1NR_EQ144G_22R00_22R00_0R50 TOP VIEW Unit:mm UG119-1.7.1E 39(47)

  • Page 48: Mg49P/Mg49Pg/Mg49G Package Outline (3.8Mm X 3.8Mm)

    4.7 MG49P/MG49PG/MG49G Package Outline (3.8mm x 4 Package Diagrams 3.8mm) 4.7 MG49P/MG49PG/MG49G Package Outline (3.8mm x 3.8mm) Figure 4-13 Package Outline MG49P/ MG49PG/MG49G UG119-1.7.1E 40(47)

  • Page 49: Figure 4-14 Recommended Pcb Layout Mg49P/Mg49Pg/Mg49G

    4.7 MG49P/MG49PG/MG49G Package Outline (3.8mm x 4 Package Diagrams 3.8mm) Figure 4-14 Recommended PCB Layout MG49P/MG49PG/MG49G UG119-1.7.1E 41(47)

  • Page 50: Mg81P Package Outline (4.5Mm X 4.5Mm)

    4 Package Diagrams 4.8 MG81P Package Outline (4.5mm x 4.5mm) 4.8 MG81P Package Outline (4.5mm x 4.5mm) Figure 4-15 Package Outline MG81P UG119-1.7.1E 42(47)

  • Page 51: Figure 4-16 Recommended Pcb Layout Mg81P

    4 Package Diagrams 4.8 MG81P Package Outline (4.5mm x 4.5mm) Figure 4-16 Recommended PCB Layout MG81P GW1NR_MG81P_4R50_4R50_0R50 TOP VIEW Unit:mm UG119-1.7.1E 43(47)

  • Page 52: Mg100P/Mg100Pf/Mg100Pa/Mg100Pt Mg100Ps Package Outline (5Mm X 5Mm)

    4.9 MG100P/MG100PF/MG100PA/MG100PT MG100PS 4 Package Diagrams Package Outline (5mm x 5mm) 4.9 MG100P/MG100PF/MG100PA/MG100PT MG100PS Package Outline (5mm x 5mm) Figure 4-17 Package Outline MG100P/MG100PF/MG100PA/ MG100PT 100X UG119-1.7.1E 44(47)

  • Page 53: Figure 4-18 Recommended Pcb Layout Mg100P/Mg100Pf/Mg100Pa/Mg100Pt/Mg100Ps

    4.9 MG100P/MG100PF/MG100PA/MG100PT MG100PS 4 Package Diagrams Package Outline (5mm x 5mm) Figure 4-18 Recommended PCB Layout MG100P/MG100PF/MG100PA/MG100PT/MG100PS GW1NR_MG100P_5R00_5R00_0R50 TOP VIEW Unit:mm UG119-1.7.1E 45(47)

  • Page 54: Fn32G Package Outline (4Mm X 4Mm)

    4 Package Diagrams 4.10 FN32G Package Outline (4mm x 4mm) 4.10 FN32G Package Outline (4mm x 4mm) Figure 4-19 Package Outline FN32G EXPOSED THERMAL PAD ZONE TOP VIEW BOTTOM VIEW SIDE VIEW UG119-1.7.1E 46(47)

  • Page 55: Figure 4-20 Recommended Pcb Layout Fn32G

    4 Package Diagrams 4.10 FN32G Package Outline (4mm x 4mm) Figure 4-20 Recommended PCB Layout FN32G GW1NR_FN32G_4R00_4R00_0R40 TOP VIEW Unit:mm 4.00 4.00 1.83 1.83 4.10 0.40 0.70 0.20 UG119-1.7.1E 47(47)

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