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GOWIN DK_GoAI_GW1NSR-LV4CQN48PC7I6 User Manual

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DK_GoAI_GW1NSR-LV4CQN48PC7I6_V2.2
User Guide
DBUG391-1.0E, 03/03/2021

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Summary of Contents for GOWIN DK_GoAI_GW1NSR-LV4CQN48PC7I6

  • Page 1 DK_GoAI_GW1NSR-LV4CQN48PC7I6_V2.2 User Guide DBUG391-1.0E, 03/03/2021...
  • Page 2 Copyright© 2021 Guangdong Gowin Semiconductor Corporation. All Rights Reserved. No part of this document may be reproduced or transmitted in any form or by any denotes, electronic, mechanical, photocopying, recording or otherwise, without the prior written consent of GOWINSEMI. Disclaimer GOWINSEMI ®...
  • Page 3 Revision History Date Version Description 03/03/2021 1.0E Initial version published.

  • Page 4: Table Of Contents

    Contents Contents Contents ....................... i List of Figures ....................iii List of Tables ...................... iv 1 About This Guide .................... 1 1.1 Purpose ..........................1 1.2 Related Documents ......................1 1.3 Terminology and Abbreviations ................... 1 1.4 Support and Feedback ....................... 2 2 Introduction .....................
  • Page 5 3.8 Camera ..........................16 3.8.1 Overview ........................16 3.8.2 FPC Interface ......................... 16 3.8.3 Pinout ..........................17 3.9 SPI FLASH ........................17 3.10 Mic ..........................18 3.11 Accelerometer ......................... 18 4 Notes ......................19 5 Gowin Software ..................... 20 DBUG391-1.0E...

  • Page 6: List Of Figures

    List of Figures List of Figures Figure 2-1 DK_GoAI_GW1NSR-LV4CQN48PC7I6_V2.2 Development Board......... 3 Figure 2-2 System Block Diagram ..................... 4 Figure 2-3 PCB Components ......................6 Figure 3-1 Connection Diagram of USB .................... 11 Figure 3-2 J-LINK Connection Diagram ..................... 11 Figure 3-3 Power System Distribution ....................
  • Page 7 List of Tables List of Tables Table 1-1 Terminology and Abbreviations ..................1 Table 2-1 Development Board Description ..................8 Table 3-1 FPGA Download Pinout ..................... 12 Table 3-2 FPGA Power Pins Distribution ................... 13 Table 3-3 FPGA Clock and Reset Pinout ................... 14 Table 3-4 LED Pinout .........................

  • Page 8: About This Guide

    DS861, GW1NSR series FPGA Products Data Sheet UG864, GW1NSR-4 Pinout UG290, Gowin FPGA Products Programming and Configuration Guide SUG100, Gowin Software User Guide 1.3 Terminology and Abbreviations The terminology and abbreviations used in this manual are as shown in Table 1-1.

  • Page 9: Support And Feedback

    Serial Peripheral Interface Phase-locked Loop QN48 QFN48 Package 1.4 Support and Feedback Gowin Semiconductor provides customers with comprehensive technical support. If you have any questions, comments, or suggestions, please feel free to contact us directly by the following ways. Website: www.gowinsemi.com/en E-mail: support@gowinsemi.com...

  • Page 10: Introduction

    2 Introduction 2.1 Overview Introduction 2.1 Overview Figure 2-1 DK_GoAI_GW1NSR-LV4CQN48PC7I6_V2.2 Development Board The development board uses GW1NS-4 SoC FPGA. SoC FPFA is embedded with an ARM Cortex-M3 hard core processor. When the ARM Cortex-M3 hard core processor is employed as the core, the needs of the min.

  • Page 11: System Block Diagram

    2 Introduction 2.2 System Block Diagram 2.2 System Block Diagram Figure 2-2 System Block Diagram 1*Camera(FPC 4*LED 50MHz connector) 1*Accelerometer 1*HDMI(TX) 2*Mic 1*64Mbit SPI Flash GW1NSR- 1*LED LV4QN48P Power 27MHZ 1.2V/1.8V/2.5V/2.8V/3.3V SWITCH SWITCH DC POWER JTAG FT232HL MINI USB JACK DBUG391-1.0E 4(20)

  • Page 12: Development Kit

    2.3 Development Kit 2.3 Development Kit The development board kit includes the following items: DK_GoAI_GW1NSR-LV4CQN48PC7I6_V2.2 Development Board  USB Data Line  Quick Start Guide  ① Gowin DK_GoAI_GW1NSR-LV4CQN48PC7I6_V2.2 Development Board ② USB Data Line ③ Quick Start Guide DBUG391-1.0E 5(20)

  • Page 13: Pcb Components

    2 Introduction 2.4 PCB Components 2.4 PCB Components Figure 2-3 PCB Components 2.5V 1.8V 1.2V 3.3V 2.8V 加速度计 FPGA SPI Flash HDMI OUT Camera ARM Debug 2.5 Features The features of the development board are as follows: 1. FPGA EQFP144 package ...
  • Page 14 2 Introduction 2.5 Features 6. Memory 256Kbits embedded Flash  64Mbits external SPI FLASH  7. HDMI（TX）Interface 4 pairs of HDMI output, one pair of clock and three pairs of data  8. Camera 24pin FPC connector with 0.5mm pitch is used. ...

  • Page 15: Development Board Description

    2 Introduction 2.6 Development Board Description 2.6 Development Board Description Table 2-1 Development Board Description Name Functional Description Technical Condition FPGA Core chip – Support an USB interface; Download Support JTAG, USB to JTAG chip integrated on board AUTOBOOT  Input power: 5V ...
  • Page 16 2 Introduction 2.6 Development Board Description Name Functional Description Technical Condition  Power interface:  Schottky diode is connected between Inverse current and positive and negative anodes of power over current protection interface;  2A self-recovery fuses are connected at power input.

  • Page 17: Development Board Circuit

    3 Development Board Circuit 3.1 FPGA Module Development Board Circuit 3.1 FPGA Module Overview For the resources of GW1NSR series of FPGA Products, please refer DS861, GW1NSR series of FPGA products Datasheet. I/O BANK Introduction For the I/O BANK, package and pinout information, see UG864, GW1NSR Series of FPGA Products Package and Pinout User Guide more details.

  • Page 18: Usb

    3 Development Board Circuit 3.2 Download & Debug 3.2.2 USB Figure 3-1 Connection Diagram of USB USB_D+ MINI USB USB 转JTAG 插座 USB_D- 芯片 GW1NSR4 3.2.3 JTAG Figure 3-2 J-LINK Connection Diagram GW1NSR4 3.2.4 Flow 1. Enable USB interface FPGA and MCU download: When downloading, plug the USB cable to USB interface (J2) of the development board, and switch SW3 to ON.

  • Page 19: Pinout

    3 Development Board Circuit 3.3 Power Supply 3.2.5 Pinout Table 3-1 FPGA Download Pinout Name Pin No. BANK Description I/O Level JTAG Signal 3.3 V JTAG Signal 3.3 V JTAG Signal 3.3 V JTAG Signal 3.3 V MODE0 Mode Selection Pin 3.3 V JTAGSEL_N JTAGSEL_N...

  • Page 20: Power System Distribution

    3 Development Board Circuit 3.3 Power Supply 3.3.2 Power System Distribution Figure 3-3 Power System Distribution HDMI DC5V Input USB to JTAG （FT2232） PAM2306AYPA DC-DC 3.3V FPGA VCCO0&VCCO1 27Mhz Clock & FPGA Reset PAM2306AYPA DC-DC 2.8V FPGA VCCX PAM2306AYPA DC-DC 2.5V FPGA VCCO2...

  • Page 21: Clock

    3 Development Board Circuit 3.4 Clock 3.4 Clock 3.4.1 Overview The development board provides a 27MHz crystal oscillator connected to the PLL input pin. This can be employed as the input clock for the PLL in FPGA. Frequency division and multiplication of PLL can provide clocks required by users.

  • Page 22: Switches

    3 Development Board Circuit 3.6 Switches 3.6 Switches 3.6.1 Overview There is a dip switch SW3 on the development board, which can be used to select JTAG interface or USB interface for FPGA download and debugging. 3.7 HDMI TX 3.7.1 Overview HDMI3 interface is connected to the FPGA pin directly.

  • Page 23: Camera

    3 Development Board Circuit 3.8 Camera Name Pin No. BANK I/O Level Description 2.5V HDMI differential data HDMI_TXA1P HDMI_TXA1N 2.5V HDMI differential data HDMI_TXA0P 2.5V HDMI differential data HDMI_TXA0N 2.5V HDMI differential data HDMI differential HDMI_TXACP 2.5V clock HDMI differential HDMI_TXACN 2.5V clock...

  • Page 24: Pinout

    3 Development Board Circuit 3.9 SPI FLASH 3.8.3 Pinout Table 3-6 FPC Pinout Name Pin No. BANK Description I/O Level PIXDATA9 Video output channel 9 3.3V PIXDATA8 Video output channel 8 3.3V PIXDATA7 Video output channel 7 1.8V PIXCLK Pixel clock output 3.3V 1.8V PIXDATA6...

  • Page 25: Mic

    3 Development Board Circuit 3.10 Mic 3.10 Mic There are two Mics left on the development board for audio data acquisition. Table 3-8 Mic Pinout Name Pin No. BANK Description I/O Level MIC_SD Write protection input 1.8V MIC_SCK Data output 1.8V MIC_WS Chip select signal...

  • Page 26: Notes

    4 Notes Notes Notes for the Use of the Development Board Handle with care and pay attention to electrostatic protection. DBUG391-1.0E 19(20)

  • Page 27: Gowin Software

    5 Gowin Software Gowin Software SUG100, Gowin Software User Guide for details. DBUG391-1.0E 20(20)

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