Seco Smarc CSM-B79 User Manual page 56

By setting both 1-3 switch and 2-4 switch in OFF position, four PCI-e lanes #A...#D coming from SMARC
card edge connector, type WINWIN p/n WPES-064AN41B22UWC or equivalent, with the pinout shown in the following table.
Please check the User Manual of the SMARC
can be applied to these lanes.
Description
+12V Power Rail
+12V Power Rail
+12V Power Rail
Power Ground
SM Bus Clock line. +3.3V_RUN electrical level with
2.2 up resistor, derived by I2C_PM_CK with
voltage level translator
SM Bus Data line. +3.3V_RUN electrical level with
2.2 up resistor, derived by I2C_PM_DAT
with voltage level translator
Power Ground
+3.3V Power Rail
Not Connected
+3.3V Auxiliary Power Rail
Wake signal for link reactivation, connected directly
to SMARC ®
Not Connected
Power Ground
®
SMARC module PCI-e lane Transmitter lane #A+
SMARC ® module PCI-e lane Transmitter lane #A-
CSM-B79
CSM-B79 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.1 - Author: A.R - Reviewed by S.R. - Copyright © 2021 SECO S.p.A.
®
module used for details about the availability of these lanes and all possible groupings that
PCI-e x 4 Slot CN33
Pin name Pin nr.
+12V_RUN B1
+12V_RUN B2
+12V_RUN B3
GND B4
PCIE_SMB_CLK B5
PCIE_SMB_DAT B6
GND B7
+3.3V_RUN B8
JTAG1 B9
+3.3V_ALW B10
WAKE0# B11
RSVD B12
GND B13
PCIE_A_TX+_X4 B14
PCIE_A_TX-_X4 B15
®
card edge connector are carried to a standard PCI-e x4
Pin nr. Pin name Description
A1 PRSNT1# Hot Plug presence detect (tied to GND)
A2 +12V_RUN +12V Power Rail
A3 +12V_RUN +12V Power Rail
A4 GND Power Ground
A5 JTAG2 Not connected
A6 JTAG3 Not connected
A7 JTAG4 Not connected
A8 JTAG5 Not connected
A9 +3.3V_RUN +3.3V Power Rail
A10 +3.3V_RUN +3.3V Power Rail
Reset signal to the add-in card, derived by
A11 PCIE_RST#_X4 PCIE_A_RST# using an Ultra High Speed CMOS
buffer.
A12 GND Power Ground
PCI-e reference clock lane +, for the add in card,
A13 PCIE_CLK+_X4 directly derived by PCIE_A_REFCLK+ using a Clock
Buffer
PCI-e reference clock lane-, for the add in card,
directly derived by PCIE_A_REFCLK- using a Clock
A14 PCIE_CLK-_X4
Buffer
A15 GND Power Ground
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