Seco Smarc CSM-B79 User Manual page 54

Two 2-way jumpers allow forcing the W_DISABLEX#_B signals available on this socket
JP17 position W_DISABLE1#_B
Not Inserted WWAN enabled
Inserted WWAN disabled
Signals carried to M.2 WLAN Slot are the following:
PCIe_A_Tx+_M2 / PCIe_A_Tx-_M2: SMARC
PCIe_A_Rx+_M2 / PCIe_A_Rx-_M2: SMARC
PCIe_A_CLK+_M2 / PCIe_A_CLK-_M2: PCI Express Reference Clock for lane #A, directly derived by PCIE_A_REFCLK differential pair from SMARC
a Clock Buffer
®
USB5+ / USB5-: SMARC module USB Port #5 differential pair
PCIe_WAKE#
connected directly to SMARC ®
PCIe_A_RST#: WWAN specific reset Active Low Output Signal, directly driven by the SMARC
PCIE_A_CLKREQ#: PCI Express Clock Request Input for lane #A. This signal shall be driven low by the module inserted in the M.2 WWAN slot, in order to ensure
that the PCI Express Reference Clock for lane #B is made available for this slot (i.e. PCIe_B_CLK+_M2 / PCIe_B_CLK-_M2)
W_DISABLE1_B#: this signal can be used to enable/disable the WWAN functionality of a M.2 WWAN module plugged in slot CN38. This signal is directly managed
using jumper JP17 as described in the table above
W_DISABLE2_B#: this signal can be used to enable/disable the WWAN / GNSS functionality of a M.2 WWAN module plugged in slot CN38. This signal is directly
managed using jumper JP18, as described in the table below
M2_KEYB_LED: Indicator Output Signal driven low by the module inserted in the M.2 WWAN slot, used to activate LED diode D116 on CSM-B79 carrier board,
signalling, when LED is ON, correct working of Modem functionality
UIM_RST#: Reset signal line, sent from M.2 WWAN card to the UIM module
UIM_DATA: Bidirectional Data line between M.2 WWAN card and UIM module
UIM_CLK: Clock line, output from M.2 WWAN card to the UIM module
UIM_PWR: Power line for UIM module
CSM-B79
CSM-B79 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.1 - Author: A.R - Reviewed by S.R. - Copyright © 2021 SECO S.p.A.
JP18 position W_DISABLE2#_B
Not Inserted WWAN enabled
Inserted WWAN disabled
®
module PCI Express lane #A, Transmitting Output Differential pair
®
module PCI Express lane #A, Receiving Input Differential pair
y the M.2 WWAN module inserted in the slot when it requires waking up the system. This signal is
PCIE_WAKE# signal
®
module to the module inserted in the M.2 WWAN slot
®
module using
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