Seco Smarc CSM-B79 User Manual page 45

3.3.7 CSI Camera Connector
CSI Camera Connector
Pin Signal
1 +3.3V_RUN
2 +3.3V_RUN
3 CSI1_RX0+
4 CSI1_RX0-
5 GND
6 CSI1_RX1+
7 CSI1_RX1-
8 GND
9 CSI1_RX2+
10 CSI1_RX2-
11 GPIO3/CAM1_RST#
12 CSI1_RX3+
13 CSI1_RX3-
14 GND
15 CSI1_CK+
16 CSI1_CK-
17 GND
18 I2C_CAM1_CK
®
I2C_CAM1_CK: SMARC module I2C Bus clock line for MIPI CSI1 data support link
®
I2C_CAM1_DAT: SMARC module I2C Bus data line for MIPI CSI1 data support link
GPIO1 / CAM1_PWR#: Power Enable for MIPI CSI1, Active Low Output. This signal shares the same pin from card edge connector with GPIO1 (par.3.3.27)
GPIO3 / CAM1_RST#: Reset signal for MIPI CSI1, Active Low Output. This signal shares the same pin from card edge connector with GPIO3 (par.3.3.27)
CSM-B79
CSM-B79 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.1 - Author: A.R - Reviewed by S.R. - Copyright © 2021 SECO S.p.A.
According to SMARC
CN39
serial camera interfaces. MIPI CSI0 supports up to two differential data lanes, while MIPI CSI1
can support up to four differential data lanes.
Pin Signal
Both interfaces are carried to an FFC/FPC connector CN39, type Hirose p/n FH12A-36S-
19 I2C_CAM1_DAT
0.5SH(55), which is able to accept 36 poles 0.5mm pitch FFC cables,
20 GPIO1/CAM1_PWR#
with the pinout shown in the table on the left.
21 CAM_MCLK
Signal related to MIPI CSI0 (2-lanes MIPI-CSI) interface:
22 GPIO0/CAM0_PWR#
CSI0_RX0+ / CSI0_RX0-: SMARC
23 I2C_CAM0_CK
CSI0_RX1+ / CSI0_RX1-: SMARC
24 I2C_CAM0_DAT
CSI0_CK+ / CSI0_CK-: SMARC
25 GND
I2C_CAM0_CK: SMARC
26 CSI0_CK+
I2C_CAM0_DAT: SMARC
27 CSI0_CK-
GPIO0 / CAM0_PWR#: Power Enable for MIPI CSI0, Active Low Output. This signal shares the
28 GND
same pin from card edge connector with GPIO0 (par.3.3.27)
29 CSI0_RX0+
GPIO2 / CAM0_RST#: Reset signal for MIPI CSI0, Active Low Output. This signal shares the
30 CSI0_RX0-
same pin from card edge connector with GPIO2 (par.3.3.27)
31 GPIO2/CAM0_RST#
Signal related to MIPI CSI1 (4-lanes MIPI-CSI) interface:
32 CSI0_RX1+
CSI1_RX0+ / CSI1_RX0-: SMARC
33 CSI0_RX1-
CSI1_RX1+ / CSI1_RX1-: SMARC
34 GND
CSI1_RX2+ / CSI1_RX2-: SMARC
35 ---
CSI1_RX3+ / CSI1_RX3-: SMARC
36 ---
CSI1_CK+ / CSI1_CK-: SMARC
®
Rel. 2.1.1 specification, SMARC
®
module MIPI CSI0 Port differential data pair #0
®
module MIPI CSI0 Port differential data pair #1
®
module MIPI CSI0 Port differential clock pair
®
module I2C Bus clock line for MIPI CSI0 data support link
®
module I2C Bus data line for MIPI CSI0 data support link
®
module MIPI CSI1 Port differential data pair #0
®
module MIPI CSI1 Port differential data pair #1
®
module MIPI CSI1 Port differential data pair #2
®
module MIPI CSI1 Port differential data pair #3
®
module MIPI CSI1 Port differential clock pair
®
module can offer up to two MIPI CSI
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