Texas Instruments TPSF12C1EVM-FILTER User Manual page 5

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2 Hardware
2.1 EVM Description
The TPSF12C1EVM-FILTER
application. Figure 2-1 presents typical schematics of equivalent single-phase passive and active filter designs –
with the active circuit component values corresponding to this EVM. Terminals designated L, N and PE refer to
live, neutral and protective earth, respectively. Comparing the passive and active circuits in this example, the CM
inductance of chokes L
CM1
with AEF.
L
AC
C
X1
source
2.2 F
N
PE
C C
Y1 Y2
2.2 nF 2.2 nF
4-6 times
lower
inductance
L
AC
C
X1
source
2.2 F
N
PE
C C
Y1 Y2
2.2 nF 2.2 nF
The AEF circuit uses a capacitive multiplier circuit in place of the two Y-capacitors normally placed between
the CM chokes in a conventional two-stage passive filter design. The TPSF12C1 senses the high-frequency
CM disturbance on the two power lines using two Y-rated sense capacitors and injects a noise-canceling
current back into the power lines using a Y-rated inject capacitor. The X-capacitor placed between the two
CM chokes provides a low-impedance path between the power lines from a CM standpoint, typically up to
low-MHz frequencies. This allows current injection onto one power line (neutral in this case) using only one inject
capacitor.
Acting as a complete filter with features such as surge immunity protection and X-capacitor resistive discharge,
the EVM uses a recommended
required, the user can add external components for inrush limiting and fuse protection.
2.2 Setup
Figure 2-2 shows a typical EMI measurement setup. A line impedance stabilization network (LISN) in series with
each supply line enables measurement of the total EMI that includes DM and CM propagation components. A
splitter/combiner can be used to extract the DM and CM noise signatures from the total noise measurement.
SLVUCQ2A – JULY 2023 – REVISED JULY 2023
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can be used for evaluation and for system development of an EMI filter circuit and
and L reduces from 12 mH to 2 mH by virtue of the higher effective Y-capacitance
CM2
L
Passive filter circuit
CM1
12 mH
C C
Y5 Y6
2.2 nF
2.2 nF
L
Active filter circuit
CM1
2 mH
C
G1
C C
SEN2 SEN1
680 pF
680 pF
COMP1
SENSE1A
SENSE1B
TPSF12C1
SENSE2A
SENSE2B
REFGND
Figure 2-1. Passive and Active Filter Schematics
PCB layout to minimize the overall noise signature and required board area. If
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C
12 mH
X2
2.2 F
4-6 times
lower
inductance
C
2 mH
X2
2.2 F
C
R
INJ
G
4.7 nF
C
G2
C
D3
C
R
D1
COMP2
D1A
INJ
R
D1
C
EN
D2
12 V
VDD
R
D2
C
VDD
IGND
Active EMI Filter Evaluation Module for Single-Phase AC Power Systems
L
CM2
C
X3
2.2 F
C C
Y3 Y4
2.2 nF 2.2 nF
L
CM2
C
X3
2.2 F
C C
Y3 Y4
2.2 nF
2.2 nF
R
D3
D
INJ
Hardware
AC/DC
regulator
Chassis
AC/DC
regulator
Chassis
5