Section 9
Testing functionality by secondary injection
9.7.3.1
Verifying the settings
Verification of START value and time delay to operate
1.
Check that the settings in the IED are appropriate, especially the START value and the definite
time delay. Set StartFreqGrad, to a rather small negative value.
2.
Supply the IED with three-phase voltages at their rated values.
3.
Slowly decrease the frequency of the applied voltage, with an increasing rate-of-change that
finally exceeds the setting of StartFreqGrad, and check that the START signal appears.
4.
Note the operate value and compare it with the set value.
5.
Increase the frequency to rated operating conditions, and zero rate-of-change.
6.
Check that the START signal resets.
7.
Instantaneously decrease the frequency of the applied voltage to a value about 20% lower than
the nominal value.
8.
Measure the time delay for the TRIP signal, and compare it with the set value.
Extended testing
1.
The test above can be repeated to check a positive setting of StartFreqGrad.
2.
The tests above can be repeated to check the time to reset.
3.
The tests above can be repeated to test the RESTORE signal, when the frequency recovers
from a low value.
9.7.3.2
Completing the test
Continue to test another function or end the test by changing the TESTMODE setting to Off. Restore
connections and settings to the original values, if changed for testing purposes.
9.8
Secondary system supervision
9.8.1
Current circuit supervision CCSSPVC
Prepare the IED for verification of settings outlined in Section
The Current circuit supervision function CCSSPVC is conveniently tested with the same three-phase
test set as used when testing the measuring functions in the IED.
The condition for this procedure is that the setting of IMinOp is lower than the setting of Ip>Block.
9.8.1.1
Verifying the settings
1.
Check the input circuits and the operate value of the IMinOp current level detector by injecting
current, one phase at a time.
2.
Check the phase current blocking function for all three phases by injecting current, one phase
at a time. The output signals shall reset with a delay of 1 second when the current exceeds 1.5
· IBase.
3.
Inject a current 0.1 · IBase to the reference current input I5.
4.
Increase slowly the current in one of the phases and check that FAIL output is obtained when
the current is above 0.9 · IBase.
112
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1MRK 505 395-UEN Rev. G
"Preparing the IED to verify
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