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Table 32. Memory Settings details (continued)
Option
DIMM Self Healing (Post Package Repair) on
Uncorrectable Memory Error
Correctable Error Logging
Memory Map Out
Processor Settings
To view the Processor Settings screen, power on the system, press F2, and click System Setup Main Menu > System
BIOS > Processor Settings.
Table 33. Processor Settings details
Option
Logical Processor
CPU Interconnect Speed
Virtualization Technology
36
Pre-operating system management applications
Description
When option is set to Retrain at Next boot, the system performs the
force one-time full memory training steps at next power on and boot time
is slowed on next boot.
When option is set to Enable, the system performs the force full
memory training steps on every power on and boot time is slowed on
every boot.
Enables or disables Post Packing Repair (PPR) on uncorrectable memory
error. This option is set to Enabled by default.
Enables or disables correctable error logging. This option is set to
Disabled by default.
This option controls DIMMs slots on the system. This option is set to
Enabled by default. It allows to disable system installed DIMMs.
Description
Each processor core supports up to two logical processors. If
this option is set to Enabled, the BIOS displays all the logical
processors. If this option is set to Disabled, the BIOS displays
only one logical processor per core. This option is set to Enabled
by default.
Enables you to govern the frequency of the communication links
among the processors in the system.
NOTE:
The standard and basic bin processors support lower
link frequencies.
The options available are Maximum data rate, 16 GT/s,
14.4 GT/s, and 12.8 GT/s. This option is set to
Maximum data rate by default.
Maximum data rate indicates that the BIOS runs the
communication links at the maximum frequency
supported by the processors. You can also select specific
frequencies that the processors support, which can vary.
For best performance, you should select Maximum data rate.
Any reduction in the
communication link frequency affects the performance of non-
local memory access and cache coherency traffic.
In addition, it can slow access to non-local I/O devices from a
particular processor.
However, if power saving considerations outweigh performance,
reduce the frequency of the processor
communication links. Before reducing the frequency, you must
localize the memory and I/O access to the nearest
NUMA node to minimize the impact to system performance.
Enables or disables the virtualization technology for the
processor. This option is set to Enabled by default.
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